cortex-m3: support connecting under reset

[fw/openocd] / src / target / stm32_stlink.c

diff --git a/src/target/stm32_stlink.c b/src/target/stm32_stlink.c
index 7336b14780aa87fbcbcfcf77dabf7dba75b7c704..f9daa014a0de3851093b19b4dec497c2e839169a 100644 (file)
--- a/src/target/stm32_stlink.c
+++ b/src/target/stm32_stlink.c
@@ -363,7 +363,7 @@ static int stlink_debug_entry(struct target *target)
                armv7m->exception_number = 0;
        }
 
-       LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
+       LOG_DEBUG("entered debug state in core mode: %s at PC 0x%08" PRIx32 ", target->state: %s",
                armv7m_mode_strings[armv7m->core_mode],
                *(uint32_t *)(arm->pc->value),
                target_state_name(target));
@@ -398,7 +398,7 @@ static int stm32_stlink_poll(struct target *target)
                        return retval;
 
                target_call_event_callbacks(target, TARGET_EVENT_HALTED);
-               LOG_DEBUG("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+               LOG_DEBUG("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
        }
 
        return ERROR_OK;
@@ -409,19 +409,36 @@ static int stm32_stlink_assert_reset(struct target *target)
        int res;
        struct stlink_interface_s *stlink_if = target_to_stlink(target);
        struct armv7m_common *armv7m = target_to_armv7m(target);
+       bool use_srst_fallback = true;
 
        LOG_DEBUG("%s", __func__);
 
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
+
+       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
+       stlink_if->layout->api->write_debug_reg(stlink_if->fd, DCB_DEMCR, VC_CORERESET);
+
+       if (jtag_reset_config & RESET_HAS_SRST) {
+               jtag_add_reset(0, 1);
+               res = stlink_if->layout->api->assert_srst(stlink_if->fd, 0);
+               if (res == ERROR_COMMAND_NOTFOUND)
+                       LOG_ERROR("Hardware srst not supported, falling back to software reset");
+               else if (res == ERROR_OK) {
+                       /* hardware srst supported */
+                       use_srst_fallback = false;
+               }
+       }
+
+       if (use_srst_fallback) {
+               /* stlink v1 api does support hardware srst, so we use a software reset fallback */
+               stlink_if->layout->api->write_debug_reg(stlink_if->fd, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
+       }
+
        res = stlink_if->layout->api->reset(stlink_if->fd);
 
        if (res != ERROR_OK)
                return res;
 
-       /* virtual assert reset, we need it for the internal
-        * jtag state machine
-        */
-       jtag_add_reset(1, 1);
-
        /* registers are now invalid */
        register_cache_invalidate(armv7m->core_cache);
 
@@ -438,9 +455,15 @@ static int stm32_stlink_assert_reset(struct target *target)
 static int stm32_stlink_deassert_reset(struct target *target)
 {
        int res;
+       struct stlink_interface_s *stlink_if = target_to_stlink(target);
+
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
 
        LOG_DEBUG("%s", __func__);
 
+       if (jtag_reset_config & RESET_HAS_SRST)
+               stlink_if->layout->api->assert_srst(stlink_if->fd, 1);
+
        /* virtual deassert reset, we need it for the internal
         * jtag state machine
         */
@@ -498,7 +521,7 @@ static int stm32_stlink_resume(struct target *target, int current,
        struct breakpoint *breakpoint = NULL;
        struct reg *pc;
 
-       LOG_DEBUG("%s %d %x %d %d", __func__, current, address,
+       LOG_DEBUG("%s %d 0x%08x %d %d", __func__, current, address,
                        handle_breakpoints, debug_execution);
 
        if (target->state != TARGET_HALTED) {
@@ -610,7 +633,7 @@ static int stm32_stlink_step(struct target *target, int current,
        stlink_debug_entry(target);
        target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 
-       LOG_INFO("halted: PC: 0x%x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+       LOG_INFO("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
 
        return ERROR_OK;
 }
@@ -628,7 +651,7 @@ static int stm32_stlink_read_memory(struct target *target, uint32_t address,
        if (!count || !buffer)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
-       LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+       LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
 
        /* prepare byte count, buffer threshold
         * and address increment for none 32bit access
@@ -676,7 +699,7 @@ static int stm32_stlink_write_memory(struct target *target, uint32_t address,
        if (!count || !buffer)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
-       LOG_DEBUG("%s %x %d %d", __func__, address, size, count);
+       LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
 
        /* prepare byte count, buffer threshold
         * and address increment for none 32bit access