target/riscv: fix dead assignment

[fw/openocd] / src / target / riscv / riscv.c

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index f46e157e3638397586d7bc56ff90b1709fa3e06a..5444fca01b84696afb5ab2d9dfc33f4a50aa734b 100644 (file)
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
+// SPDX-License-Identifier: GPL-2.0-or-later
 
 #include <assert.h>
 #include <stdlib.h>
@@ -109,30 +109,30 @@ typedef enum slot {
 #define MAX_HWBPS                      16
 #define DRAM_CACHE_SIZE                16
 
-uint8_t ir_dtmcontrol[4] = {DTMCONTROL};
+static uint8_t ir_dtmcontrol[4] = {DTMCONTROL};
 struct scan_field select_dtmcontrol = {
        .in_value = NULL,
        .out_value = ir_dtmcontrol
 };
-uint8_t ir_dbus[4] = {DBUS};
+static uint8_t ir_dbus[4] = {DBUS};
 struct scan_field select_dbus = {
        .in_value = NULL,
        .out_value = ir_dbus
 };
-uint8_t ir_idcode[4] = {0x1};
+static uint8_t ir_idcode[4] = {0x1};
 struct scan_field select_idcode = {
        .in_value = NULL,
        .out_value = ir_idcode
 };
 
-bscan_tunnel_type_t bscan_tunnel_type;
+static bscan_tunnel_type_t bscan_tunnel_type;
 int bscan_tunnel_ir_width; /* if zero, then tunneling is not present/active */
 
 static const uint8_t bscan_zero[4] = {0};
 static const uint8_t bscan_one[4] = {1};
 
 static uint8_t ir_user4[4];
-struct scan_field select_user4 = {
+static struct scan_field select_user4 = {
        .in_value = NULL,
        .out_value = ir_user4
 };
@@ -256,6 +256,11 @@ static const virt2phys_info_t sv48 = {
        .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
 };
 
+static enum riscv_halt_reason riscv_halt_reason(struct target *target, int hartid);
+static void riscv_info_init(struct target *target, struct riscv_info *r);
+static void riscv_invalidate_register_cache(struct target *target);
+static int riscv_step_rtos_hart(struct target *target);
+
 static void riscv_sample_buf_maybe_add_timestamp(struct target *target, bool before)
 {
        RISCV_INFO(r);
@@ -448,10 +453,7 @@ static int riscv_init_target(struct command_context *cmd_ctx,
        if (bscan_tunnel_ir_width != 0) {
                assert(target->tap->ir_length >= 6);
                uint32_t ir_user4_raw = 0x23 << (target->tap->ir_length - 6);
-               ir_user4[0] = (uint8_t)ir_user4_raw;
-               ir_user4[1] = (uint8_t)(ir_user4_raw >>= 8);
-               ir_user4[2] = (uint8_t)(ir_user4_raw >>= 8);
-               ir_user4[3] = (uint8_t)(ir_user4_raw >>= 8);
+               h_u32_to_le(ir_user4, ir_user4_raw);
                select_user4.num_bits = target->tap->ir_length;
                bscan_tunneled_ir_width[0] = bscan_tunnel_ir_width;
                if (bscan_tunnel_type == BSCAN_TUNNEL_DATA_REGISTER)
@@ -708,7 +710,6 @@ static int add_trigger(struct target *target, struct trigger *trigger)
                        return result;
                int type = get_field(tdata1, MCONTROL_TYPE(riscv_xlen(target)));
 
-               result = ERROR_OK;
                switch (type) {
                        case 1:
                                result = maybe_add_trigger_t1(target, trigger, tdata1);
@@ -861,7 +862,7 @@ int riscv_read_by_any_size(struct target *target, target_addr_t address, uint32_
        return ERROR_FAIL;
 }
 
-int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
+static int riscv_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        LOG_DEBUG("[%d] @0x%" TARGET_PRIxADDR, target->coreid, breakpoint->address);
        assert(breakpoint);
@@ -941,7 +942,7 @@ static int remove_trigger(struct target *target, struct trigger *trigger)
        return ERROR_OK;
 }
 
-int riscv_remove_breakpoint(struct target *target,
+static int riscv_remove_breakpoint(struct target *target,
                struct breakpoint *breakpoint)
 {
        if (breakpoint->type == BKPT_SOFT) {
@@ -1019,7 +1020,7 @@ int riscv_remove_watchpoint(struct target *target,
  * The GDB server uses this information to tell GDB what data address has
  * been hit, which enables GDB to print the hit variable along with its old
  * and new value. */
-int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
+static int riscv_hit_watchpoint(struct target *target, struct watchpoint **hit_watchpoint)
 {
        struct watchpoint *wp = target->watchpoints;
 
@@ -1462,7 +1463,7 @@ static int resume_finish(struct target *target)
  * @par single_hart When true, only resume a single hart even if SMP is
  * configured.  This is used to run algorithms on just one hart.
  */
-int riscv_resume(
+static int riscv_resume(
                struct target *target,
                int current,
                target_addr_t address,
@@ -3199,7 +3200,8 @@ struct target_type riscv_target = {
 
 /*** RISC-V Interface ***/
 
-void riscv_info_init(struct target *target, struct riscv_info *r)
+/* Initializes the shared RISC-V structure. */
+static void riscv_info_init(struct target *target, struct riscv_info *r)
 {
        memset(r, 0, sizeof(*r));
 
@@ -3244,7 +3246,9 @@ static int riscv_resume_go_all_harts(struct target *target)
        return ERROR_OK;
 }
 
-int riscv_step_rtos_hart(struct target *target)
+/* Steps the hart that's currently selected in the RTOS, or if there is no RTOS
+ * then the only hart. */
+static int riscv_step_rtos_hart(struct target *target)
 {
        RISCV_INFO(r);
        if (riscv_select_current_hart(target) != ERROR_OK)
@@ -3302,7 +3306,8 @@ int riscv_set_current_hartid(struct target *target, int hartid)
        return ERROR_OK;
 }
 
-void riscv_invalidate_register_cache(struct target *target)
+/* Invalidates the register cache. */
+static void riscv_invalidate_register_cache(struct target *target)
 {
        LOG_DEBUG("[%d]", target->coreid);
        register_cache_invalidate(target->reg_cache);
@@ -3452,7 +3457,7 @@ bool riscv_is_halted(struct target *target)
        return r->is_halted(target);
 }
 
-enum riscv_halt_reason riscv_halt_reason(struct target *target, int hartid)
+static enum riscv_halt_reason riscv_halt_reason(struct target *target, int hartid)
 {
        RISCV_INFO(r);
        if (riscv_set_current_hartid(target, hartid) != ERROR_OK)