Upstream tons of RISC-V changes.

[fw/openocd] / src / target / riscv / program.c

diff --git a/src/target/riscv/program.c b/src/target/riscv/program.c
index 5e899b252d816a3d65b843727487701b7eb27291..8e2ce5dbd524881e4ecb3b5856b312e84a517976 100644 (file)
--- a/src/target/riscv/program.c
+++ b/src/target/riscv/program.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -30,7 +32,7 @@ int riscv_program_init(struct riscv_program *p, struct target *target)
 int riscv_program_write(struct riscv_program *program)
 {
        for (unsigned i = 0; i < program->instruction_count; ++i) {
-               LOG_DEBUG("%p: debug_buffer[%02x] = DASM(0x%08x)", program, i, program->debug_buffer[i]);
+               LOG_DEBUG("debug_buffer[%02x] = DASM(0x%08x)", i, program->debug_buffer[i]);
                if (riscv_write_debug_buffer(program->target, i,
                                        program->debug_buffer[i]) != ERROR_OK)
                        return ERROR_FAIL;
@@ -56,7 +58,8 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
        if (riscv_program_ebreak(p) != ERROR_OK) {
                LOG_ERROR("Unable to write ebreak");
                for (size_t i = 0; i < riscv_debug_buffer_size(p->target); ++i)
-                       LOG_ERROR("ram[%02x]: DASM(0x%08lx) [0x%08lx]", (int)i, (long)p->debug_buffer[i], (long)p->debug_buffer[i]);
+                       LOG_ERROR("ram[%02x]: DASM(0x%08" PRIx32 ") [0x%08" PRIx32 "]",
+                                       (int)i, p->debug_buffer[i], p->debug_buffer[i]);
                return ERROR_FAIL;
        }
 
@@ -79,6 +82,11 @@ int riscv_program_exec(struct riscv_program *p, struct target *t)
        return ERROR_OK;
 }
 
+int riscv_program_sdr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
+{
+       return riscv_program_insert(p, sd(d, b, offset));
+}
+
 int riscv_program_swr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
 {
        return riscv_program_insert(p, sw(d, b, offset));
@@ -94,6 +102,11 @@ int riscv_program_sbr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno
        return riscv_program_insert(p, sb(d, b, offset));
 }
 
+int riscv_program_ldr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
+{
+       return riscv_program_insert(p, ld(d, b, offset));
+}
+
 int riscv_program_lwr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno b, int offset)
 {
        return riscv_program_insert(p, lw(d, b, offset));
@@ -109,6 +122,18 @@ int riscv_program_lbr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno
        return riscv_program_insert(p, lb(d, b, offset));
 }
 
+int riscv_program_csrrsi(struct riscv_program *p, enum gdb_regno d, unsigned int z, enum gdb_regno csr)
+{
+       assert(csr >= GDB_REGNO_CSR0 && csr <= GDB_REGNO_CSR4095);
+       return riscv_program_insert(p, csrrsi(d, z, csr - GDB_REGNO_CSR0));
+}
+
+int riscv_program_csrrci(struct riscv_program *p, enum gdb_regno d, unsigned int z, enum gdb_regno csr)
+{
+       assert(csr >= GDB_REGNO_CSR0 && csr <= GDB_REGNO_CSR4095);
+       return riscv_program_insert(p, csrrci(d, z, csr - GDB_REGNO_CSR0));
+}
+
 int riscv_program_csrr(struct riscv_program *p, enum gdb_regno d, enum gdb_regno csr)
 {
        assert(csr >= GDB_REGNO_CSR0 && csr <= GDB_REGNO_CSR4095);