nds32: Use DMA to access memory as no DCache
[fw/openocd] / src / target / nds32_v3_common.c
index f0cd77d234079ab1e37a768adbf2be16f5311f87..e01025f2669ad61e842c4904353840707eaf39c5 100644 (file)
@@ -71,8 +71,6 @@ static int nds32_v3_debug_entry(struct nds32 *nds32, bool enable_watchpoint)
 {
        LOG_DEBUG("nds32_v3_debug_entry");
 
-       jtag_poll_set_enabled(false);
-
        enum target_state backup_state = nds32->target->state;
        nds32->target->state = TARGET_HALTED;
 
@@ -117,8 +115,6 @@ static int nds32_v3_debug_entry(struct nds32 *nds32, bool enable_watchpoint)
                if (enable_watchpoint)
                        CHECK_RETVAL(v3_common_callback->activate_hardware_watchpoint(nds32->target));
 
-               jtag_poll_set_enabled(true);
-
                return ERROR_FAIL;
        }
 
@@ -228,9 +224,6 @@ static int nds32_v3_leave_debug_state(struct nds32 *nds32, bool enable_watchpoin
                target_add_breakpoint(target, &syscall_breakpoint);
        }
 
-       /* enable polling */
-       jtag_poll_set_enabled(true);
-
        return ERROR_OK;
 }
 
@@ -247,6 +240,7 @@ static int nds32_v3_get_exception_address(struct nds32 *nds32,
        uint32_t match_count;
        int32_t i;
        static int32_t number_of_hard_break;
+       uint32_t bp_control;
 
        if (number_of_hard_break == 0) {
                aice_read_debug_reg(aice, NDS_EDM_SR_EDM_CFG, &edm_cfg);
@@ -262,6 +256,14 @@ static int nds32_v3_get_exception_address(struct nds32 *nds32,
                if (match_bits & (1 << i)) {
                        aice_read_debug_reg(aice, NDS_EDM_SR_BPA0 + i, address);
                        match_count++;
+
+                       /* If target hits multiple read/access watchpoint,
+                        * select the first one. */
+                       aice_read_debug_reg(aice, NDS_EDM_SR_BPC0 + i, &bp_control);
+                       if (0x3 == (bp_control & 0x3)) {
+                               match_count = 1;
+                               break;
+                       }
                }
        }
 
@@ -553,19 +555,25 @@ int nds32_v3_write_buffer(struct target *target, uint32_t address,
                return ERROR_FAIL;
 
        if (nds32->hit_syscall) {
-               /* Use bus mode to access memory during virtual hosting */
                struct aice_port_s *aice = target_to_aice(target);
                enum nds_memory_access origin_access_channel;
-               int result;
-
                origin_access_channel = memory->access_channel;
-               memory->access_channel = NDS_MEMORY_ACC_BUS;
-               aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
 
+               /* If target has no cache, use BUS mode to access memory. */
+               if ((memory->dcache.line_size == 0)
+                       || (memory->dcache.enable == false)) {
+                       /* There is no Dcache or Dcache is disabled. */
+                       memory->access_channel = NDS_MEMORY_ACC_BUS;
+                       aice_memory_access(aice, NDS_MEMORY_ACC_BUS);
+               }
+
+               int result;
                result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer);
 
-               memory->access_channel = origin_access_channel;
-               aice_memory_access(aice, origin_access_channel);
+               if (NDS_MEMORY_ACC_CPU == origin_access_channel) {
+                       memory->access_channel = NDS_MEMORY_ACC_CPU;
+                       aice_memory_access(aice, NDS_MEMORY_ACC_CPU);
+               }
 
                return result;
        }