target/cortex_a: Replace printf() with LOG_DEBUG()

[fw/openocd] / src / target / nds32_v2.c

diff --git a/src/target/nds32_v2.c b/src/target/nds32_v2.c
index da8bbbc9529ffac6aecfe31509ba26dfe7c825fc..392bd6eb99fec41c77e713c9d6b71d90593f5123 100644 (file)
--- a/src/target/nds32_v2.c
+++ b/src/target/nds32_v2.c
@@ -112,7 +112,7 @@ static int nds32_v2_activate_hardware_breakpoint(struct target *target)
                                /* enable breakpoint (physical address) */
                                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + hbr_index, 0xA);
 
-                       LOG_DEBUG("Add hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
+                       LOG_DEBUG("Add hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                        bp->address);
 
                        hbr_index++;
@@ -139,7 +139,7 @@ static int nds32_v2_deactivate_hardware_breakpoint(struct target *target)
                else
                        return ERROR_FAIL;
 
-               LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" PRIx32, hbr_index,
+               LOG_DEBUG("Remove hardware BP %" PRId32 " at %08" TARGET_PRIxADDR, hbr_index,
                                bp->address);
 
                hbr_index++;
@@ -184,7 +184,7 @@ static int nds32_v2_activate_hardware_watchpoint(struct target *target)
                /* set value */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPV0 + wp_num, 0);
 
-               LOG_DEBUG("Add hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32, wp_num,
+               LOG_DEBUG("Add hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32, wp_num,
                                wp->address, wp->mask);
 
        }
@@ -204,7 +204,7 @@ static int nds32_v2_deactivate_hardware_watchpoint(struct target *target)
                /* disable watchpoint */
                aice_write_debug_reg(aice, NDS_EDM_SR_BPC0 + wp_num, 0x0);
 
-               LOG_DEBUG("Remove hardware wathcpoint %" PRId32 " at %08" PRIx32 " mask %08" PRIx32,
+               LOG_DEBUG("Remove hardware watchpoint %" PRId32 " at %08" TARGET_PRIxADDR " mask %08" PRIx32,
                                wp_num, wp->address, wp->mask);
        }
 
@@ -256,7 +256,7 @@ static int nds32_v2_check_interrupt_stack(struct nds32_v2_common *nds32_v2)
                aice_write_register(aice, IR2, val_ir2);
        }
 
-       /* get origianl DT bit and set to current state let debugger has same memory view
+       /* get original DT bit and set to current state let debugger has same memory view
           PSW.IT MUST be turned off.  Otherwise, DIM could not operate normally. */
        aice_read_register(aice, IR1, &val_ir1);
        modified_psw = val_ir0 | (val_ir1 & 0x80);
@@ -405,7 +405,7 @@ static int nds32_v2_deassert_reset(struct target *target)
 }
 
 static int nds32_v2_checksum_memory(struct target *target,
-               uint32_t address, uint32_t count, uint32_t *checksum)
+               target_addr_t address, uint32_t count, uint32_t *checksum)
 {
        LOG_WARNING("Not implemented: %s", __func__);
 
@@ -561,8 +561,8 @@ static int nds32_v2_run_algorithm(struct target *target,
                struct mem_param *mem_params,
                int num_reg_params,
                struct reg_param *reg_params,
-               uint32_t entry_point,
-               uint32_t exit_point,
+               target_addr_t entry_point,
+               target_addr_t exit_point,
                int timeout_ms,
                void *arch_info)
 {
@@ -635,11 +635,11 @@ static int nds32_v2_examine(struct target *target)
        return ERROR_OK;
 }
 
-static int nds32_v2_translate_address(struct target *target, uint32_t *address)
+static int nds32_v2_translate_address(struct target *target, target_addr_t *address)
 {
        struct nds32 *nds32 = target_to_nds32(target);
        struct nds32_memory *memory = &(nds32->memory);
-       uint32_t physical_address;
+       target_addr_t physical_address;
 
        /* Following conditions need to do address translation
         * 1. BUS mode
@@ -656,7 +656,7 @@ static int nds32_v2_translate_address(struct target *target, uint32_t *address)
        return ERROR_OK;
 }
 
-static int nds32_v2_read_buffer(struct target *target, uint32_t address,
+static int nds32_v2_read_buffer(struct target *target, target_addr_t address,
                uint32_t size, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -676,7 +676,7 @@ static int nds32_v2_read_buffer(struct target *target, uint32_t address,
        return nds32_read_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_write_buffer(struct target *target, uint32_t address,
+static int nds32_v2_write_buffer(struct target *target, target_addr_t address,
                uint32_t size, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -696,7 +696,7 @@ static int nds32_v2_write_buffer(struct target *target, uint32_t address,
        return nds32_write_buffer(target, address, size, buffer);
 }
 
-static int nds32_v2_read_memory(struct target *target, uint32_t address,
+static int nds32_v2_read_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);
@@ -716,7 +716,7 @@ static int nds32_v2_read_memory(struct target *target, uint32_t address,
        return nds32_read_memory(target, address, size, count, buffer);
 }
 
-static int nds32_v2_write_memory(struct target *target, uint32_t address,
+static int nds32_v2_write_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct nds32 *nds32 = target_to_nds32(target);