target/cortex_m,hla_target: rework Cortex-M register handling part 4

[fw/openocd] / src / target / nds32_reg.c

diff --git a/src/target/nds32_reg.c b/src/target/nds32_reg.c
index 7cefcb1a234c32255a46ec4d09da728adda21a5a..034a075841c41c48bf196ef566420eeadb3a520c 100644 (file)
--- a/src/target/nds32_reg.c
+++ b/src/target/nds32_reg.c
@@ -367,7 +367,7 @@ bool nds32_reg_exception(uint32_t number, uint32_t value)
                        field_value = (value >> ex_reg_value->ex_value_bit_pos) &
                                ex_reg_value->ex_value_mask;
                        if (field_value == ex_reg_value->ex_value) {
-                               LOG_WARNING("It will generate exceptions as setting %" PRId32 " to %s",
+                               LOG_WARNING("It will generate exceptions as setting %" PRIu32 " to %s",
                                                value, nds32_regs[number].simple_mnemonic);
                                return true;
                        }