flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / src / target / nds32.h

diff --git a/src/target/nds32.h b/src/target/nds32.h
index c447673431ed2b3e8d7e2b9846f8cec671a3b50d..d0b680a97c6546cab70b4df6f1e265795d8f209b 100644 (file)
--- a/src/target/nds32.h
+++ b/src/target/nds32.h
@@ -1,19 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2013 Andes Technology                                   *
  *   Hsiangkai Wang <hkwang@andestech.com>                                 *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifndef OPENOCD_TARGET_NDS32_H
@@ -235,7 +224,8 @@ struct nds32_misc_config {
  * Represents a generic Andes core.
  */
 struct nds32 {
-       uint32_t common_magic;
+       unsigned int common_magic;
+
        struct reg_cache *core_cache;
 
        /** Handle for the debug module. */