+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
/***************************************************************************
* Copyright (C) 2013 Andes Technology *
* Hsiangkai Wang <hkwang@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "nds32_tlb.h"
#include "nds32_disassembler.h"
-const int NDS32_BREAK_16 = 0x00EA; /* 0xEA00 */
-const int NDS32_BREAK_32 = 0x0A000064; /* 0x6400000A */
-
struct nds32_edm_operation nds32_edm_ops[NDS32_EDM_OPERATION_MAX_NUM];
uint32_t nds32_edm_ops_num;
"LOAD STORE GLOBAL STOP",
};
-static const int NDS32_LM_SIZE_TABLE[16] = {
+static const int nds32_lm_size_table[16] = {
4 * 1024,
8 * 1024,
16 * 1024,
2 * 1024,
};
-static const int NDS32_LINE_SIZE_TABLE[6] = {
+static const int nds32_line_size_table[6] = {
0,
8,
16,
} else {
uint32_t val = 0;
if ((nds32->fpu_enable == false)
- && (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
+ && (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_FPU)) {
retval = ERROR_OK;
} else if ((nds32->audio_enable == false)
- && (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
+ && (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_AUMR)) {
retval = ERROR_OK;
} else {
retval = aice_read_register(aice, mapped_regnum, &val);
} else {
uint64_t val = 0;
if ((nds32->fpu_enable == false)
- && ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
+ && ((reg_arch_info->num >= FD0) && (reg_arch_info->num <= FD31))) {
retval = ERROR_OK;
} else {
retval = aice_read_reg_64(aice, reg_arch_info->num, &val);
{
uint32_t value;
- if (ERROR_OK == nds32_get_mapped_reg(nds32, MR8, &value)) {
+ if (nds32_get_mapped_reg(nds32, MR8, &value) == ERROR_OK) {
if (value & 0x1)
nds32->memory.icache.enable = true;
else
reg_arch_info->num, reg->name, value);
if ((nds32->fpu_enable == false) &&
- (NDS32_REG_TYPE_FPU == nds32_reg_type(mapped_regnum))) {
+ (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_FPU)) {
buf_set_u32(reg->value, 0, 32, 0);
} else if ((nds32->audio_enable == false) &&
- (NDS32_REG_TYPE_AUMR == nds32_reg_type(mapped_regnum))) {
+ (nds32_reg_type(mapped_regnum) == NDS32_REG_TYPE_AUMR)) {
buf_set_u32(reg->value, 0, 32, 0);
} else {
reg->dirty = false;
/* update registers to take effect right now */
- if (IR0 == mapped_regnum) {
+ if (mapped_regnum == IR0) {
nds32_update_psw(nds32);
- } else if (MR0 == mapped_regnum) {
+ } else if (mapped_regnum == MR0) {
nds32_update_mmu_info(nds32);
- } else if ((MR6 == mapped_regnum) || (MR7 == mapped_regnum)) {
+ } else if ((mapped_regnum == MR6) || (mapped_regnum == MR7)) {
/* update lm information */
nds32_update_lm_info(nds32);
- } else if (MR8 == mapped_regnum) {
+ } else if (mapped_regnum == MR8) {
nds32_update_cache_info(nds32);
- } else if (FUCPR == mapped_regnum) {
+ } else if (mapped_regnum == FUCPR) {
/* update audio/fpu setting */
nds32_check_extension(nds32);
}
}
if ((nds32->fpu_enable == false) &&
- ((FD0 <= reg_arch_info->num) && (reg_arch_info->num <= FD31))) {
+ ((reg_arch_info->num >= FD0) && (reg_arch_info->num <= FD31))) {
buf_set_u32(reg->value, 0, 32, 0);
buf_set_u32(reg->value, 32, 32, 0);
reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
- if (FD0 <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31) {
+ if (reg_arch_info[i].num >= FD0 && reg_arch_info[i].num <= FD31) {
reg_list[i].value = reg_arch_info[i].value;
reg_list[i].type = &nds32_reg_access_type_64;
reg_list[i].type = &nds32_reg_access_type;
reg_list[i].group = "general";
- if ((FS0 <= reg_arch_info[i].num) && (reg_arch_info[i].num <= FS31)) {
+ if ((reg_arch_info[i].num >= FS0) && (reg_arch_info[i].num <= FS31)) {
reg_list[i].reg_data_type->type = REG_TYPE_IEEE_SINGLE;
reg_list[i].reg_data_type->id = "ieee_single";
reg_list[i].group = "float";
}
}
- if (R16 <= reg_arch_info[i].num && reg_arch_info[i].num <= R25)
+ if (reg_arch_info[i].num >= R16 && reg_arch_info[i].num <= R25)
reg_list[i].caller_save = true;
else
reg_list[i].caller_save = false;
reg_list[i].feature = malloc(sizeof(struct reg_feature));
- if (R0 <= reg_arch_info[i].num && reg_arch_info[i].num <= IFC_LP)
+ if (reg_arch_info[i].num >= R0 && reg_arch_info[i].num <= IFC_LP)
reg_list[i].feature->name = "org.gnu.gdb.nds32.core";
- else if (CR0 <= reg_arch_info[i].num && reg_arch_info[i].num <= SECUR0)
+ else if (reg_arch_info[i].num >= CR0 && reg_arch_info[i].num <= SECUR0)
reg_list[i].feature->name = "org.gnu.gdb.nds32.system";
- else if (D0L24 <= reg_arch_info[i].num && reg_arch_info[i].num <= CBE3)
+ else if (reg_arch_info[i].num >= D0L24 && reg_arch_info[i].num <= CBE3)
reg_list[i].feature->name = "org.gnu.gdb.nds32.audio";
- else if (FPCSR <= reg_arch_info[i].num && reg_arch_info[i].num <= FD31)
+ else if (reg_arch_info[i].num >= FPCSR && reg_arch_info[i].num <= FD31)
reg_list[i].feature->name = "org.gnu.gdb.nds32.fpu";
cache->num_regs++;
r = nds32_reg_current(nds32, regnum);
- if (ERROR_OK != r->type->get(r))
+ if (r->type->get(r) != ERROR_OK)
return ERROR_FAIL;
*value = buf_get_u32(r->value, 0, 32);
/* init end_address */
*end_address = address_end;
- if (NDS_MEMORY_ACC_CPU == memory->access_channel)
+ if (memory->access_channel == NDS_MEMORY_ACC_CPU)
return ERROR_OK;
if (edm->access_control == false) {
return ERROR_OK;
}
- if (NDS_MEMORY_SELECT_AUTO != memory->mode) {
+ if (memory->mode != NDS_MEMORY_SELECT_AUTO) {
LOG_DEBUG("Memory mode is not AUTO");
return ERROR_OK;
}
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
nds32->virtual_hosting ? ", virtual hosting" : "");
/* save pc value to pseudo register pc */
- struct reg *reg = register_get_by_name(target->reg_cache, "pc", 1);
+ struct reg *reg = register_get_by_name(target->reg_cache, "pc", true);
buf_set_u32(reg->value, 0, 32, value_pc);
return ERROR_OK;
misc_config->div_instruction = (value_cr4 >> 5) & 0x1;
misc_config->mac_instruction = (value_cr4 >> 6) & 0x1;
misc_config->audio_isa = (value_cr4 >> 7) & 0x3;
- misc_config->L2_cache = (value_cr4 >> 9) & 0x1;
+ misc_config->l2_cache = (value_cr4 >> 9) & 0x1;
misc_config->reduce_register = (value_cr4 >> 10) & 0x1;
misc_config->addr_24 = (value_cr4 >> 11) & 0x1;
misc_config->interruption_level = (value_cr4 >> 12) & 0x1;
break_insn = NDS32_BREAK_32;
}
- if (breakpoint->orig_instr != NULL)
- free(breakpoint->orig_instr);
+ free(breakpoint->orig_instr);
breakpoint->orig_instr = malloc(breakpoint->length);
memcpy(breakpoint->orig_instr, &data, breakpoint->length);
i, buf_get_u32(reg->value, 0, 32));
reg_arch_info = reg->arch_info;
- if (FD0 <= reg_arch_info->num && reg_arch_info->num <= FD31) {
+ if (reg_arch_info->num >= FD0 && reg_arch_info->num <= FD31) {
uint64_t val = buf_get_u64(reg_arch_info->value, 0, 64);
aice_write_reg_64(aice, reg_arch_info->num, val);
} else {
nds32->edm.breakpoint_num = (edm_cfg & 0x7) + 1;
- if ((nds32->edm.version & 0x1000) || (0x60 <= nds32->edm.version))
+ if ((nds32->edm.version & 0x1000) || (nds32->edm.version >= 0x60))
nds32->edm.access_control = true;
else
nds32->edm.access_control = false;
uint32_t size_index;
nds32_get_mapped_reg(nds32, MR6, &value_mr6);
size_index = (value_mr6 >> 1) & 0xF;
- nds32->memory.ilm_size = NDS32_LM_SIZE_TABLE[size_index];
+ nds32->memory.ilm_size = nds32_lm_size_table[size_index];
nds32_get_mapped_reg(nds32, MR7, &value_mr7);
size_index = (value_mr7 >> 1) & 0xF;
- nds32->memory.dlm_size = NDS32_LM_SIZE_TABLE[size_index];
+ nds32->memory.dlm_size = nds32_lm_size_table[size_index];
return ERROR_OK;
}
nds32->syscall_break.asid = 0;
nds32->syscall_break.length = 4;
- nds32->syscall_break.set = 0;
+ nds32->syscall_break.is_set = false;
nds32->syscall_break.orig_instr = NULL;
nds32->syscall_break.next = NULL;
nds32->syscall_break.unique_id = 0x515CAll + target->target_number;
- nds32->syscall_break.linked_BRP = 0;
+ nds32->syscall_break.linked_brp = 0;
nds32_reg_init();
- if (ERROR_FAIL == nds32_reg_cache_init(target, nds32))
+ if (nds32_reg_cache_init(target, nds32) == ERROR_FAIL)
return ERROR_FAIL;
- if (ERROR_OK != nds32_init_register_table(nds32))
+ if (nds32_init_register_table(nds32) != ERROR_OK)
return ERROR_FAIL;
return ERROR_OK;
return ERROR_OK;
}
- if (ERROR_OK == nds32_probe_tlb(nds32, address, physical))
+ if (nds32_probe_tlb(nds32, address, physical) == ERROR_OK)
return ERROR_OK;
- if (ERROR_OK == nds32_walk_page_table(nds32, address, physical))
+ if (nds32_walk_page_table(nds32, address, physical) == ERROR_OK)
return ERROR_OK;
return ERROR_FAIL;
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_cache *dcache = &(nds32->memory.dcache);
struct nds32_cache *icache = &(nds32->memory.icache);
- uint32_t dcache_line_size = NDS32_LINE_SIZE_TABLE[dcache->line_size];
- uint32_t icache_line_size = NDS32_LINE_SIZE_TABLE[icache->line_size];
+ uint32_t dcache_line_size = nds32_line_size_table[dcache->line_size];
+ uint32_t icache_line_size = nds32_line_size_table[icache->line_size];
uint32_t cur_address;
int result;
uint32_t start_line, end_line;
* be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide
* address translation or not. */
target_addr_t physical_addr;
- if (ERROR_FAIL == target->type->virt2phys(target, cur_address,
- &physical_addr))
+ if (target->type->virt2phys(target, cur_address, &physical_addr) == ERROR_FAIL)
return ERROR_FAIL;
/* I$ invalidate */
if (no_step == false) {
struct aice_port_s *aice = target_to_aice(target);
- if (ERROR_OK != aice_step(aice))
+ if (aice_step(aice) != ERROR_OK)
return ERROR_FAIL;
}
struct aice_port_s *aice = target_to_aice(target);
- if (ERROR_OK != aice_step(aice))
+ if (aice_step(aice) != ERROR_OK)
return ERROR_FAIL;
/* save state */
nds32_get_mapped_reg(nds32, PC, &value_pc);
- if (ERROR_OK != nds32_read_opcode(nds32, value_pc, &opcode))
+ if (nds32_read_opcode(nds32, value_pc, &opcode) != ERROR_OK)
return ERROR_FAIL;
- if (ERROR_OK != nds32_evaluate_opcode(nds32, opcode, value_pc,
- &instruction))
+ if (nds32_evaluate_opcode(nds32, opcode, value_pc, &instruction) != ERROR_OK)
return ERROR_FAIL;
/* hit 'break 0x7FFF' */
nds32_step_without_watchpoint(nds32);
/* before single_step, save exception address */
- if (ERROR_OK != result)
+ if (result != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_IMPRECISE:
case NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE:
case NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE:
- if (ERROR_OK != nds32->get_watched_address(nds32,
- &(nds32->watched_address), reason))
+ if (nds32->get_watched_address(nds32, &(nds32->watched_address), reason) != ERROR_OK)
return ERROR_FAIL;
target->debug_reason = DBG_REASON_WATCHPOINT;
LOG_DEBUG("nds32_login");
- if (nds32->edm_passcode != NULL) {
+ if (nds32->edm_passcode) {
/* convert EDM passcode to command sequences */
passcode_length = strlen(nds32->edm_passcode);
command_sequence[0] = '\0';
strcat(command_sequence, command_str);
}
- if (ERROR_OK != aice_program_edm(aice, command_sequence))
+ if (aice_program_edm(aice, command_sequence) != ERROR_OK)
return ERROR_FAIL;
/* get current privilege level */
return ERROR_FAIL;
sprintf(command_str, "write_misc %s 0x%" PRIx32 ";", reg_name, code);
- if (ERROR_OK != aice_program_edm(aice, command_str))
+ if (aice_program_edm(aice, command_str) != ERROR_OK)
return ERROR_FAIL;
}
}
if (nds32_target_state(nds32, &state) != ERROR_OK)
return ERROR_FAIL;
- if (TARGET_HALTED != state)
+ if (state != TARGET_HALTED)
/* TODO: if state == TARGET_HALTED, check ETYPE is DBGI or not */
- if (ERROR_OK != aice_halt(aice))
+ if (aice_halt(aice) != ERROR_OK)
return ERROR_FAIL;
CHECK_RETVAL(nds32->enter_debug_state(nds32, true));
if (state == TARGET_HALTED) {
if (target->state != TARGET_HALTED) {
/* if false_hit, continue free_run */
- if (ERROR_OK != nds32->enter_debug_state(nds32, true)) {
+ if (nds32->enter_debug_state(nds32, true) != ERROR_OK) {
struct aice_port_s *aice = target_to_aice(target);
aice_run(aice);
return ERROR_OK;
int nds32_get_gdb_fileio_info(struct target *target, struct gdb_fileio_info *fileio_info)
{
/* fill syscall parameters to file-I/O info */
- if (NULL == fileio_info) {
+ if (!fileio_info) {
LOG_ERROR("Target has not initial file-I/O data structure");
return ERROR_FAIL;
}
LOG_DEBUG("hit syscall ID: 0x%" PRIx32, syscall_id);
/* free previous identifier storage */
- if (NULL != fileio_info->identifier) {
- free(fileio_info->identifier);
- fileio_info->identifier = NULL;
- }
+ free(fileio_info->identifier);
+ fileio_info->identifier = NULL;
uint32_t reg_r0, reg_r1, reg_r2;
nds32_get_mapped_reg(nds32, R0, ®_r0);
struct aice_port_s *aice = target_to_aice(target);
struct nds32 *nds32 = target_to_nds32(target);
+ /* REVISIT: can nds32 profile without halting? */
+ if (target->state != TARGET_HALTED) {
+ LOG_WARNING("target %s is not halted (profiling)", target->cmd_name);
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
if (max_num_samples < iteration)
iteration = max_num_samples;
int nds32_gdb_fileio_write_memory(struct nds32 *nds32, uint32_t address,
uint32_t size, const uint8_t *buffer)
{
- if ((NDS32_SYSCALL_FSTAT == nds32->active_syscall_id) ||
- (NDS32_SYSCALL_STAT == nds32->active_syscall_id)) {
+ if ((nds32->active_syscall_id == NDS32_SYSCALL_FSTAT) ||
+ (nds32->active_syscall_id == NDS32_SYSCALL_STAT)) {
/* If doing GDB file-I/O, target should convert 'struct stat'
* from gdb-format to target-format */
uint8_t stat_buffer[NDS32_STRUCT_STAT_SIZE];
stat_buffer[59] = 0;
return nds32_write_buffer(nds32->target, address, NDS32_STRUCT_STAT_SIZE, stat_buffer);
- } else if (NDS32_SYSCALL_GETTIMEOFDAY == nds32->active_syscall_id) {
+ } else if (nds32->active_syscall_id == NDS32_SYSCALL_GETTIMEOFDAY) {
/* If doing GDB file-I/O, target should convert 'struct timeval'
* from gdb-format to target-format */
uint8_t timeval_buffer[NDS32_STRUCT_TIMEVAL_SIZE];
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