Transform 'u16' to 'uint16_t'

[fw/openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index d69a0a0aa3c5aa9d83d5125b37c2b4c120f4d792..fe99773d873f866267fb4f2ff3ee98e481394a9f 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -37,8 +37,8 @@ int mips_m4k_halt(struct target_s *target);
 int mips_m4k_soft_reset_halt(struct target_s *target);
 int mips_m4k_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution);
 int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_breakpoints);
-int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
-int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);
+int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
+int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer);
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
 int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
 int mips_m4k_quit(void);
@@ -235,7 +235,7 @@ int mips_m4k_halt(struct target_s *target)
 
        if (target->state == TARGET_RESET)
        {
-               if ((jtag_reset_config & RESET_SRST_PULLS_TRST) && jtag_srst)
+               if ((jtag_get_reset_config() & RESET_SRST_PULLS_TRST) && jtag_get_srst())
                {
                        LOG_ERROR("can't request a halt while in reset if nSRST pulls nTRST");
                        return ERROR_TARGET_FAILURE;
@@ -267,6 +267,7 @@ int mips_m4k_assert_reset(target_t *target)
        LOG_DEBUG("target->state: %s",
                Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
 
+       enum reset_types jtag_reset_config = jtag_get_reset_config();
        if (!(jtag_reset_config & RESET_HAS_SRST))
        {
                LOG_ERROR("Can't assert SRST");
@@ -551,7 +552,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                }
                else
                {
-                       u16 verify = 0xffff;
+                       uint16_t verify = 0xffff;
                        
                        if((retval = target_read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
@@ -612,7 +613,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                        u32 current_instr;
                        
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 4, 1, (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -626,10 +627,10 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                }
                else
                {
-                       u16 current_instr;
+                       uint16_t current_instr;
                        
                        /* check that user program has not modified breakpoint instruction */
-                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK)
+                       if ((retval = target_read_memory(target, breakpoint->address, 2, 1, (uint8_t*)&current_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -727,7 +728,7 @@ void mips_m4k_enable_watchpoints(struct target_s *target)
        }
 }
 
-int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
@@ -747,26 +748,41 @@ int mips_m4k_read_memory(struct target_s *target, u32 address, u32 size, u32 cou
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       switch (size)
-       {
-               case 4:
-               case 2:
-               case 1:
-                       /* if noDMA off, use DMAACC mode for memory read */
-                       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-                               return mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
-                       else
-                               return mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
-               default:
-                       LOG_ERROR("BUG: we shouldn't get here");
-                       exit(-1);
-                       break;
+       /* if noDMA off, use DMAACC mode for memory read */
+       int retval;
+       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
+               retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+       else
+               retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+       if (ERROR_OK != retval)
+               return retval;
+
+       /* TAP data register is loaded LSB first (little endian) */
+       if (target->endianness == TARGET_BIG_ENDIAN) 
+       {
+               u32 i, t32;
+               uint16_t t16;
+
+               for(i = 0; i < (count*size); i += size)
+               {
+                       switch(size)
+                       {
+                               case 4:
+                                       t32 = le_to_h_u32(&buffer[i]);
+                                       h_u32_to_be(&buffer[i], t32);
+                                       break;
+                               case 2:
+                                       t16 = le_to_h_u16(&buffer[i]);
+                                       h_u16_to_be(&buffer[i], t16);
+                                       break;
+                       }
+               }
        }
 
        return ERROR_OK;
 }
 
-int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
+int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, uint8_t *buffer)
 {
        mips32_common_t *mips32 = target->arch_info;
        mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
@@ -786,24 +802,33 @@ int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 co
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       switch (size)
-       {
-               case 4:
-               case 2:
-               case 1:
-                       /* if noDMA off, use DMAACC mode for memory write */
-                       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
-                               mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
-                       else
-                               mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
-                       break;
-               default:
-                       LOG_ERROR("BUG: we shouldn't get here");
-                       exit(-1);
-                       break;
-       }
+       /* TAP data register is loaded LSB first (little endian) */
+       if (target->endianness == TARGET_BIG_ENDIAN)
+       {
+               u32 i, t32;
+               uint16_t t16;
 
-       return ERROR_OK;
+               for(i = 0; i < (count*size); i += size)
+               {
+                       switch(size) 
+                       {
+                               case 4:
+                                       t32 = be_to_h_u32(&buffer[i]);
+                                       h_u32_to_le(&buffer[i], t32);
+                                       break;
+                               case 2:
+                                       t16 = be_to_h_u16(&buffer[i]);
+                                       h_u16_to_le(&buffer[i], t16);
+                                       break;
+                       }
+               }
+       }          
+
+       /* if noDMA off, use DMAACC mode for memory write */
+       if(ejtag_info->impcode & EJTAG_IMP_NODMA)
+               return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+       else
+               return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
 }
 
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx)
@@ -879,7 +904,7 @@ int mips_m4k_examine(struct target_s *target)
        return ERROR_OK;
 }
 
-int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer)
+int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, uint8_t *buffer)
 {
        return mips_m4k_write_memory(target, address, 4, count, buffer);
 }