mips32_save_context(target);
- LOG_DEBUG("entered debug state at PC 0x%x, target->state: %s", \
- *(u32*)(mips32->core_cache->reg_list[MIPS32_PC].value), target_state_strings[target->state]);
+ LOG_DEBUG("entered debug state at PC 0x%x, target->state: %s",
+ *(u32*)(mips32->core_cache->reg_list[MIPS32_PC].value),
+ Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
return ERROR_OK;
}
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
- LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+ LOG_DEBUG("target->state: %s",
+ Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
if (target->state == TARGET_HALTED)
{
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
- LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+ LOG_DEBUG("target->state: %s",
+ Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
if (!(jtag_reset_config & RESET_HAS_SRST))
{
int mips_m4k_deassert_reset(target_t *target)
{
- LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+ LOG_DEBUG("target->state: %s",
+ Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
/* deassert reset lines */
jtag_add_reset(0, 0);