int mips_m4k_debug_entry(target_t *target)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t debug_reg;
/* read debug register */
int mips_m4k_poll(target_t *target)
{
int retval;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
/* read ejtag control reg */
int mips_m4k_halt(struct target_s *target)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
target_state_name(target));
int mips_m4k_assert_reset(target_t *target)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
target_state_name(target));
int mips_m4k_single_step_core(target_t *target)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
/* configure single step mode */
mips_ejtag_config_step(ejtag_info, 1);
int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
breakpoint_t *breakpoint = NULL;
uint32_t resume_pc;
int mips_m4k_step(struct target_s *target, int current, uint32_t address, int handle_breakpoints)
{
/* get pointers to arch-specific information */
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
breakpoint_t *breakpoint = NULL;
if (target->state != TARGET_HALTED)
int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{
- mips32_common_t *mips32 = target->arch_info;
- mips32_comparator_t * comparator_list = mips32->inst_break_list;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips32_comparator * comparator_list = mips32->inst_break_list;
int retval;
if (breakpoint->set)
int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{
/* get pointers to arch-specific information */
- mips32_common_t *mips32 = target->arch_info;
- mips32_comparator_t * comparator_list = mips32->inst_break_list;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips32_comparator * comparator_list = mips32->inst_break_list;
int retval;
if (!breakpoint->set)
int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{
- mips32_common_t *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target->arch_info;
if (breakpoint->type == BKPT_HARD)
{
int mips_m4k_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
{
/* get pointers to arch-specific information */
- mips32_common_t *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target->arch_info;
if (target->state != TARGET_HALTED)
{
return ERROR_OK;
}
-int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
{
- mips32_common_t *mips32 = target->arch_info;
- mips32_comparator_t * comparator_list = mips32->data_break_list;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips32_comparator * comparator_list = mips32->data_break_list;
int wp_num = 0;
/*
* watchpoint enabled, ignore all byte lanes in value register
return ERROR_OK;
}
-int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
{
/* get pointers to arch-specific information */
- mips32_common_t *mips32 = target->arch_info;
- mips32_comparator_t * comparator_list = mips32->data_break_list;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips32_comparator * comparator_list = mips32->data_break_list;
if (!watchpoint->set)
{
return ERROR_OK;
}
-int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
{
- mips32_common_t *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target->arch_info;
if (mips32->num_data_bpoints_avail < 1)
{
return ERROR_OK;
}
-int mips_m4k_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+int mips_m4k_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
{
/* get pointers to arch-specific information */
- mips32_common_t *mips32 = target->arch_info;
+ struct mips32_common *mips32 = target->arch_info;
if (target->state != TARGET_HALTED)
{
void mips_m4k_enable_watchpoints(struct target_s *target)
{
- watchpoint_t *watchpoint = target->watchpoints;
+ struct watchpoint *watchpoint = target->watchpoints;
/* set any pending watchpoints */
while (watchpoint)
int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
return ERROR_OK;
}
-int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap)
+int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, struct jtag_tap *tap)
{
- mips32_common_t *mips32 = &mips_m4k->mips32_common;
+ struct mips32_common *mips32 = &mips_m4k->mips32_common;
mips_m4k->common_magic = MIPSM4K_COMMON_MAGIC;
int mips_m4k_examine(struct target_s *target)
{
int retval;
- mips32_common_t *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t idcode = 0;
if (!target_was_examined(target))