Overhaul time support API

[fw/openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index f8164ff02f01f18247632607c97ce32c86ab29e3..07731a0a50d3b0312e3ec8380f0d7b4b2280bd48 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -41,7 +41,6 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
 int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 int mips_m4k_register_commands(struct command_context_s *cmd_ctx);
 int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int mips_m4k_quit(void);
 int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
 
 int mips_m4k_examine(struct target_s *target);
@@ -85,7 +84,6 @@ target_type_t mips_m4k_target =
        .target_create = mips_m4k_target_create,
        .init_target = mips_m4k_init_target,
        .examine = mips_m4k_examine,
-       .quit = mips_m4k_quit
 };
 
 int mips_m4k_examine_debug_reason(target_t *target)
@@ -524,7 +522,7 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000);
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1);
-               LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "", 
+               LOG_DEBUG("bpid: %d, bp_num %i bp_value 0x%" PRIx32 "",
                                  breakpoint->unique_id,
                                  bp_num, comparator_list[bp_num].bp_value);
        }
@@ -612,7 +610,7 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                comparator_list[bp_num].used = 0;
                comparator_list[bp_num].bp_value = 0;
                target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 0);
-               
+
        }
        else
        {
@@ -711,9 +709,9 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
         * and exclude both load and store accesses from  watchpoint
         * condition evaluation
        */
-       int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE | 
+       int enable = EJTAG_DBCn_NOSB | EJTAG_DBCn_NOLB | EJTAG_DBCn_BE |
                 (0xff << EJTAG_DBCn_BLM_SHIFT);
-       
+
        if (watchpoint->set)
        {
                LOG_WARNING("watchpoint already set");
@@ -765,7 +763,7 @@ int mips_m4k_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
        target_write_u32(target, comparator_list[wp_num].reg_address + 0x18, enable);
        target_write_u32(target, comparator_list[wp_num].reg_address + 0x20, 0);
        LOG_DEBUG("wp_num %i bp_value 0x%" PRIx32 "", wp_num, comparator_list[wp_num].bp_value);
-       
+
        return ERROR_OK;
 }
 
@@ -774,7 +772,7 @@ int mips_m4k_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
        /* get pointers to arch-specific information */
        mips32_common_t *mips32 = target->arch_info;
        mips32_comparator_t * comparator_list = mips32->data_break_list;
-       
+
        if (!watchpoint->set)
        {
                LOG_WARNING("watchpoint not set");
@@ -804,7 +802,7 @@ int mips_m4k_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
                LOG_INFO("no hardware watchpoints available");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
-               
+
        mips32->num_data_bpoints_avail--;
 
        mips_m4k_set_watchpoint(target, watchpoint);
@@ -874,28 +872,6 @@ int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t siz
        if (ERROR_OK != retval)
                return retval;
 
-       /* TAP data register is loaded LSB first (little endian) */
-       if (target->endianness == TARGET_BIG_ENDIAN)
-       {
-               uint32_t i, t32;
-               uint16_t t16;
-
-               for (i = 0; i < (count*size); i += size)
-               {
-                       switch (size)
-                       {
-                               case 4:
-                                       t32 = le_to_h_u32(&buffer[i]);
-                                       h_u32_to_be(&buffer[i], t32);
-                                       break;
-                               case 2:
-                                       t16 = le_to_h_u16(&buffer[i]);
-                                       h_u16_to_be(&buffer[i], t16);
-                                       break;
-                       }
-               }
-       }
-
        return ERROR_OK;
 }
 
@@ -919,28 +895,6 @@ int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t si
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
-       /* TAP data register is loaded LSB first (little endian) */
-       if (target->endianness == TARGET_BIG_ENDIAN)
-       {
-               uint32_t i, t32;
-               uint16_t t16;
-
-               for (i = 0; i < (count*size); i += size)
-               {
-                       switch (size)
-                       {
-                               case 4:
-                                       t32 = be_to_h_u32(&buffer[i]);
-                                       h_u32_to_le(&buffer[i], t32);
-                                       break;
-                               case 2:
-                                       t16 = be_to_h_u16(&buffer[i]);
-                                       h_u16_to_le(&buffer[i], t16);
-                                       break;
-                       }
-               }
-       }
-
        /* if noDMA off, use DMAACC mode for memory write */
        if (ejtag_info->impcode & EJTAG_IMP_NODMA)
                return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
@@ -963,11 +917,6 @@ int mips_m4k_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
        return ERROR_OK;
 }
 
-int mips_m4k_quit(void)
-{
-       return ERROR_OK;
-}
-
 int mips_m4k_init_arch_info(target_t *target, mips_m4k_common_t *mips_m4k, jtag_tap_t *tap)
 {
        mips32_common_t *mips32 = &mips_m4k->mips32_common;