mips: fix some more endian madness

[fw/openocd] / src / target / mips_m4k.c

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 589ba7a0b141edd1282c62649e308a31b0c98eee..03c996941e0c54e8381cda7a151575bf4e85707a 100644 (file)
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -120,7 +120,9 @@ static int mips_m4k_poll(struct target *target)
 
        /* read ejtag control reg */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
-       mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+       retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+       if (retval != ERROR_OK)
+               return retval;
 
        /* clear this bit before handling polling
         * as after reset registers will read zero */
@@ -131,7 +133,9 @@ static int mips_m4k_poll(struct target *target)
                ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_ROCC;
 
                mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+               retval = mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+               if (retval != ERROR_OK)
+                       return retval;
                LOG_DEBUG("Reset Detected");
        }
 
@@ -254,18 +258,14 @@ static int mips_m4k_assert_reset(struct target *target)
        {
                if (mips_m4k->is_pic32mx)
                {
-                       uint32_t mchip_cmd;
-
                        LOG_DEBUG("Using MTAP reset to reset processor...");
 
                        /* use microchip specific MTAP reset */
                        mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
                        mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
 
-                       mchip_cmd = MCHP_ASERT_RST;
-                       mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
-                       mchip_cmd = MCHP_DE_ASSERT_RST;
-                       mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
+                       mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
+                       mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST);
                        mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
                }
                else
@@ -274,7 +274,7 @@ static int mips_m4k_assert_reset(struct target *target)
                        uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
                        LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
                        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
-                       mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+                       mips_ejtag_drscan_32_out(ejtag_info, ejtag_ctrl);
                }
        }
 
@@ -868,11 +868,30 @@ static int mips_m4k_read_memory(struct target *target, uint32_t address,
        if (ERROR_OK != retval)
                return retval;
 
+       /* mips32_..._read_mem with size 4/2 returns uint32_t/uint16_t in host */
+       /* endianness, but byte array should represent target endianness       */
+       uint32_t i, t32;
+       uint16_t t16;
+       for(i = 0; i < (count*size); i += size)
+       {
+               switch(size)
+               {
+               case 4:
+                       t32 = *(uint32_t*)&buffer[i];
+                       target_buffer_set_u32(target,&buffer[i], t32);
+                       break;
+               case 2:
+                       t16 = *(uint16_t*)&buffer[i];
+                       target_buffer_set_u16(target,&buffer[i], t16);
+                       break;
+               }
+       }
+
        return ERROR_OK;
 }
 
 static int mips_m4k_write_memory(struct target *target, uint32_t address,
-               uint32_t size, uint32_t count, uint8_t *buffer)
+               uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -893,11 +912,48 @@ static int mips_m4k_write_memory(struct target *target, uint32_t address,
        if (((size == 4) && (address & 0x3u)) || ((size == 2) && (address & 0x1u)))
                return ERROR_TARGET_UNALIGNED_ACCESS;
 
+       /* mips32_..._write_mem with size 4/2 requires uint32_t/uint16_t in host */
+       /* endianness, but byte array represents target endianness               */
+       uint8_t * t = NULL;
+       t = malloc(count * sizeof(uint32_t));
+       if (t == NULL)
+       {
+               LOG_ERROR("Out of memory");
+               return ERROR_FAIL;
+       }
+
+       uint32_t i, t32;
+       uint16_t t16;
+       for(i = 0; i < (count*size); i += size)
+       {
+               switch(size)
+               {
+               case 4:
+                       t32 = target_buffer_get_u32(target,&buffer[i]);
+                       *(uint32_t*)&t[i] = t32;
+                       break;
+               case 2:
+                       t16 = target_buffer_get_u16(target,&buffer[i]);
+                       *(uint16_t*)&t[i] = t16;
+                       break;
+               }
+       }
+       buffer = t;
+
        /* if noDMA off, use DMAACC mode for memory write */
+       int retval;
        if (ejtag_info->impcode & EJTAG_IMP_NODMA)
-               return mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+               retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
        else
-               return mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+               retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+
+       if (t != NULL)
+               free(t);
+
+       if (ERROR_OK != retval)
+               return retval;
+
+       return ERROR_OK;
 }
 
 static int mips_m4k_init_target(struct command_context *cmd_ctx,
@@ -966,7 +1022,7 @@ static int mips_m4k_examine(struct target *target)
 }
 
 static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
-               uint32_t count, uint8_t *buffer)
+               uint32_t count, const uint8_t *buffer)
 {
        struct mips32_common *mips32 = target_to_mips32(target);
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
@@ -1004,30 +1060,25 @@ static int mips_m4k_bulk_write_memory(struct target *target, uint32_t address,
                ejtag_info->fast_access_save = -1;
        }
 
+       /* mips32_pracc_fastdata_xfer requires uint32_t in host endianness, */
+       /* but byte array represents target endianness                      */
        uint8_t * t = NULL;
-
-       /* TAP data register is loaded LSB first (little endian) */
-       if (target->endianness == TARGET_BIG_ENDIAN)
+       t = malloc(count * sizeof(uint32_t));
+       if (t == NULL)
        {
-               t = malloc(count * sizeof(uint32_t));
-               if (t == NULL)
-               {
-                       LOG_ERROR("Out of memory");
-                       return ERROR_FAIL;
-               }
-
-               uint32_t i, t32;
-               for(i = 0; i < (count * 4); i += 4)
-               {
-                       t32 = be_to_h_u32((uint8_t *) &buffer[i]);
-                       h_u32_to_le(&t[i], t32);
-               }
-
-               buffer = t;
+               LOG_ERROR("Out of memory");
+               return ERROR_FAIL;
        }
 
+       uint32_t i, t32;
+       for(i = 0; i < (count*4); i += 4)
+       {
+               t32 = target_buffer_get_u32(target,&buffer[i]);
+               *(uint32_t*)&t[i] = t32;
+       }
+       
        retval = mips32_pracc_fastdata_xfer(ejtag_info, mips32->fast_data_area, write_t, address,
-                       count, (uint32_t*) (void *)buffer);
+                       count, (uint32_t*) (void *)t);
 
        if (t != NULL)
                free(t);