/* microchip specific cmds */
#define MCHP_ASERT_RST 0xd1
#define MCHP_DE_ASSERT_RST 0xd0
+#define MCHP_ERASE 0xfc
+#define MCHP_STATUS 0x00
/* ejtag control register bits ECR */
#define EJTAG_CTRL_TOF (1 << 1)
uint32_t impcode;
uint32_t idcode;
uint32_t ejtag_ctrl;
+ int fast_access_save;
};
int mips_ejtag_set_instr(struct mips_ejtag *ejtag_info,
int new_instr);
int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info);
int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info);
-int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode);
int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode);
int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data);
int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data);
-int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write, uint32_t *data);
+int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data);
int mips_ejtag_init(struct mips_ejtag *ejtag_info);
int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step);