mips_ejtag.c: do not set v2.6 ECR bits on v2.0 devices
[fw/openocd] / src / target / mips_ejtag.c
index 85748146d0d7725aa6083981f066c7243de4ea06..f6cd4510e4e2371c8621073ad5b63654083bf1e1 100644 (file)
@@ -292,8 +292,8 @@ error:
 
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
 {
-       uint32_t instr = MIPS32_DRET;
-       struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &instr, .code_count = 1, .store_count = 0};
+       uint32_t pracc_list[] = {MIPS32_DRET, 0};
+       struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = pracc_list, .code_count = 1, .store_count = 0};
 
        /* execute our dret instruction */
        ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
@@ -303,6 +303,92 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
        return ctx.retval;
 }
 
+/* mips_ejtag_init_mmr - asign Memory-Mapped Registers depending
+ *                     on EJTAG version.
+ */
+static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info)
+{
+       if (ejtag_info->ejtag_version == EJTAG_VERSION_20) {
+               ejtag_info->ejtag_ibs_addr      = EJTAG_V20_IBS;
+               ejtag_info->ejtag_iba0_addr     = EJTAG_V20_IBA0;
+               ejtag_info->ejtag_ibc_offs      = EJTAG_V20_IBC_OFFS;
+               ejtag_info->ejtag_ibm_offs      = EJTAG_V20_IBM_OFFS;
+
+               ejtag_info->ejtag_dbs_addr      = EJTAG_V20_DBS;
+               ejtag_info->ejtag_dba0_addr     = EJTAG_V20_DBA0;
+               ejtag_info->ejtag_dbc_offs      = EJTAG_V20_DBC_OFFS;
+               ejtag_info->ejtag_dbm_offs      = EJTAG_V20_DBM_OFFS;
+               ejtag_info->ejtag_dbv_offs      = EJTAG_V20_DBV_OFFS;
+
+               ejtag_info->ejtag_iba_step_size = EJTAG_V20_IBAn_STEP;
+               ejtag_info->ejtag_dba_step_size = EJTAG_V20_DBAn_STEP;
+       } else {
+               ejtag_info->ejtag_ibs_addr      = EJTAG_V25_IBS;
+               ejtag_info->ejtag_iba0_addr     = EJTAG_V25_IBA0;
+               ejtag_info->ejtag_ibm_offs      = EJTAG_V25_IBM_OFFS;
+               ejtag_info->ejtag_ibasid_offs   = EJTAG_V25_IBASID_OFFS;
+               ejtag_info->ejtag_ibc_offs      = EJTAG_V25_IBC_OFFS;
+
+               ejtag_info->ejtag_dbs_addr      = EJTAG_V25_DBS;
+               ejtag_info->ejtag_dba0_addr     = EJTAG_V25_DBA0;
+               ejtag_info->ejtag_dbm_offs      = EJTAG_V25_DBM_OFFS;
+               ejtag_info->ejtag_dbasid_offs   = EJTAG_V25_DBASID_OFFS;
+               ejtag_info->ejtag_dbc_offs      = EJTAG_V25_DBC_OFFS;
+               ejtag_info->ejtag_dbv_offs      = EJTAG_V25_DBV_OFFS;
+
+               ejtag_info->ejtag_iba_step_size = EJTAG_V25_IBAn_STEP;
+               ejtag_info->ejtag_dba_step_size = EJTAG_V25_DBAn_STEP;
+       }
+}
+
+static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG v2.0: features:%s%s%s%s%s%s%s%s",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_SDBBP) ? " SDBBP_SPECIAL2" : " SDBBP",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_EADDR_NO32BIT) ? " EADDR>32bit" : " EADDR=32bit",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_COMPLEX_BREAK) ? " COMPLEX_BREAK" : "",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_DCACHE_COH) ? " DCACHE_COH" : " DCACHE_NOT_COH",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_ICACHE_COH) ? " ICACHE_COH" : " ICACHE_NOT_COH",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_NOPB) ? " noPB" : " PB",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_NODB) ? " noDB" : " DB",
+               EJTAG_IMP_HAS(EJTAG_V20_IMP_NOIB) ? " noIB" : " IB");
+       LOG_DEBUG("EJTAG v2.0: Break Channels: %i",
+               (ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
+               EJTAG_V20_IMP_BCHANNELS_MASK);
+}
+
+static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG v2.6: features:%s%s",
+               EJTAG_IMP_HAS(EJTAG_V26_IMP_R3K) ? " R3k" : " R4k",
+               EJTAG_IMP_HAS(EJTAG_V26_IMP_DINT) ? " DINT" : "");
+}
+
+static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
+{
+       LOG_DEBUG("EJTAG main: features:%s%s%s%s%s",
+               EJTAG_IMP_HAS(EJTAG_IMP_ASID8) ? " ASID_8" : "",
+               EJTAG_IMP_HAS(EJTAG_IMP_ASID6) ? " ASID_6" : "",
+               EJTAG_IMP_HAS(EJTAG_IMP_MIPS16) ? " MIPS16" : "",
+               EJTAG_IMP_HAS(EJTAG_IMP_NODMA) ? " noDMA" : " DMA",
+               EJTAG_IMP_HAS(EJTAG_DCR_MIPS64) ? " MIPS64" : " MIPS32");
+
+       switch (ejtag_info->ejtag_version) {
+               case EJTAG_VERSION_20:
+                       ejtag_v20_print_imp(ejtag_info);
+                       break;
+               case EJTAG_VERSION_25:
+               case EJTAG_VERSION_26:
+               case EJTAG_VERSION_31:
+               case EJTAG_VERSION_41:
+               case EJTAG_VERSION_51:
+                       ejtag_v26_print_imp(ejtag_info);
+                       break;
+               default:
+                       break;
+       }
+}
+
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
        int retval;
@@ -338,22 +424,23 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
                        LOG_DEBUG("EJTAG: Unknown Version Detected");
                        break;
        }
-       LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
-               ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
-               ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
-               ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
-               ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
-               ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
-               ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
-               ejtag_info->impcode & EJTAG_DCR_MIPS64  ? " MIPS64" : " MIPS32");
-
-       if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0)
-               LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
-
-       /* set initial state for ejtag control reg */
-       ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
+       ejtag_main_print_imp(ejtag_info);
+
+       if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0) {
+               LOG_DEBUG("EJTAG: DMA Access Mode detected. Disabling to "
+                         "workaround current broken code.");
+               ejtag_info->impcode |= EJTAG_IMP_NODMA;
+       }
+
+       ejtag_info->ejtag_ctrl = EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN;
+
+       if (ejtag_info->ejtag_version != EJTAG_VERSION_20)
+               ejtag_info->ejtag_ctrl |= EJTAG_CTRL_ROCC | EJTAG_CTRL_SETDEV;
+
        ejtag_info->fast_access_save = -1;
 
+       mips_ejtag_init_mmr(ejtag_info);
+
        return ERROR_OK;
 }
 
@@ -381,7 +468,7 @@ int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_
                fields[1].in_value = NULL;
                buf_set_u32(t, 0, 32, *data);
        } else
-               fields[1].in_value = (void *) data;
+               fields[1].in_value = (uint8_t *) data;
 
        jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);