flash/nor: update CC26xx/CC13xx support

[fw/openocd] / src / target / mips_ejtag.c

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 1fbdf3ceff93fae26e034396b85a3effdf5be631..03a09529ce37a2f3486b79789d4470238fbc42ab 100644 (file)
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -48,54 +48,20 @@ void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, uint32_t new_instr)
        }
 }
 
-int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
+int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info)
 {
-       struct scan_field field;
-       uint8_t r[4];
-
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE);
 
-       field.num_bits = 32;
-       field.out_value = NULL;
-       field.in_value = r;
-
-       jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
-
-       int retval;
-       retval = jtag_execute_queue();
-       if (retval != ERROR_OK) {
-               LOG_ERROR("register read failed");
-               return retval;
-       }
-
-       *idcode = buf_get_u32(field.in_value, 0, 32);
-
-       return ERROR_OK;
+       ejtag_info->idcode = 0;
+       return mips_ejtag_drscan_32(ejtag_info, &ejtag_info->idcode);
 }
 
-static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode)
+int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info)
 {
-       struct scan_field field;
-       uint8_t r[4];
-
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE);
 
-       field.num_bits = 32;
-       field.out_value = NULL;
-       field.in_value = r;
-
-       jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
-
-       int retval;
-       retval = jtag_execute_queue();
-       if (retval != ERROR_OK) {
-               LOG_ERROR("register read failed");
-               return retval;
-       }
-
-       *impcode = buf_get_u32(field.in_value, 0, 32);
-
-       return ERROR_OK;
+       ejtag_info->impcode = 0;
+       return mips_ejtag_drscan_32(ejtag_info, &ejtag_info->impcode);
 }
 
 void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf)
@@ -197,23 +163,20 @@ void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data)
 /* Set (to enable) or clear (to disable stepping) the SSt bit (bit 8) in Cp0 Debug reg (reg 23, sel 0) */
 int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
 {
-       struct pracc_queue_info ctx = {.max_code = 7};
+       struct pracc_queue_info ctx = {.ejtag_info = ejtag_info};
        pracc_queue_init(&ctx);
-       if (ctx.retval != ERROR_OK)
-               goto exit;
 
-       pracc_add(&ctx, 0, MIPS32_MFC0(8, 23, 0));                      /* move COP0 Debug to $8 */
-       pracc_add(&ctx, 0, MIPS32_ORI(8, 8, 0x0100));                   /* set SSt bit in debug reg */
+       pracc_add(&ctx, 0, MIPS32_MFC0(ctx.isa, 8, 23, 0));                     /* move COP0 Debug to $8 */
+       pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, 0x0100));                  /* set SSt bit in debug reg */
        if (!enable_step)
-               pracc_add(&ctx, 0, MIPS32_XORI(8, 8, 0x0100));          /* clear SSt bit in debug reg */
+               pracc_add(&ctx, 0, MIPS32_XORI(ctx.isa, 8, 8, 0x0100));         /* clear SSt bit in debug reg */
 
-       pracc_add(&ctx, 0, MIPS32_MTC0(8, 23, 0));                      /* move $8 to COP0 Debug */
-       pracc_add(&ctx, 0, MIPS32_LUI(8, UPPER16(ejtag_info->reg8)));           /* restore upper 16 bits  of $8 */
-       pracc_add(&ctx, 0, MIPS32_B(NEG16((ctx.code_count + 1))));                      /* jump to start */
-       pracc_add(&ctx, 0, MIPS32_ORI(8, 8, LOWER16(ejtag_info->reg8)));        /* restore lower 16 bits of $8 */
+       pracc_add(&ctx, 0, MIPS32_MTC0(ctx.isa, 8, 23, 0));                     /* move $8 to COP0 Debug */
+       pracc_add(&ctx, 0, MIPS32_LUI(ctx.isa, 8, UPPER16(ejtag_info->reg8)));  /* restore upper 16 bits  of $8 */
+       pracc_add(&ctx, 0, MIPS32_B(ctx.isa, NEG16((ctx.code_count + 1) << ctx.isa)));          /* jump to start */
+       pracc_add(&ctx, 0, MIPS32_ORI(ctx.isa, 8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
 
-       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
-exit:
+       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1);
        pracc_queue_free(&ctx);
        return ctx.retval;
 }
@@ -272,11 +235,11 @@ error:
 
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
 {
-       uint32_t pracc_list[] = {MIPS32_DRET, 0};
-       struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = pracc_list, .code_count = 1, .store_count = 0};
+       pa_list pracc_list = {.instr = MIPS32_DRET(ejtag_info->isa), .addr = 0};
+       struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &pracc_list, .code_count = 1, .store_count = 0};
 
        /* execute our dret instruction */
-       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
+       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 0); /* shift out instr, omit last check */
 
        /* pic32mx workaround, false pending at low core clock */
        jtag_add_sleep(1000);
@@ -371,12 +334,11 @@ static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
-       int retval;
-
-       retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
-       if (retval != ERROR_OK)
+       int retval = mips_ejtag_get_impcode(ejtag_info);
+       if (retval != ERROR_OK) {
+               LOG_ERROR("impcode read failed");
                return retval;
-       LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
+       }
 
        /* get ejtag version */
        ejtag_info->ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);