mips: fix gaffe in previous commit

[fw/openocd] / src / target / mips32_pracc.c

diff --git a/src/target/mips32_pracc.c b/src/target/mips32_pracc.c
index d96867aa17c258eccecaca5dbf2f6220108350ee..2dc7a8fb982f37f8d6ba9725ee7560e91036a4a3 100644 (file)
--- a/src/target/mips32_pracc.c
+++ b/src/target/mips32_pracc.c
@@ -119,7 +119,7 @@ static int wait_for_pracc_rw(struct mips_ejtag *ejtag_info, uint32_t *ctrl)
                mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
                if (ejtag_ctrl & EJTAG_CTRL_PRACC)
                        break;
-               LOG_DEBUG("DEBUGMODULE: No memory access in progress!\n");
+               LOG_DEBUG("DEBUGMODULE: No memory access in progress!");
                return ERROR_JTAG_DEVICE_ERROR;
        }
 
@@ -176,9 +176,7 @@ static int mips32_pracc_exec_read(struct mips32_pracc_context *ctx, uint32_t add
        mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
 
        jtag_add_clocks(5);
-       jtag_execute_queue();
-
-       return ERROR_OK;
+       return jtag_execute_queue();
 }
 
 static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t address)
@@ -196,7 +194,10 @@ static int mips32_pracc_exec_write(struct mips32_pracc_context *ctx, uint32_t ad
        mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
 
        jtag_add_clocks(5);
-       jtag_execute_queue();
+       int retval;
+       retval = jtag_execute_queue();
+       if (retval != ERROR_OK)
+               return retval;
 
        if ((address >= MIPS32_PRACC_PARAM_IN)
                && (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
@@ -928,7 +929,7 @@ int mips32_pracc_read_regs(struct mips_ejtag *ejtag_info, uint32_t *regs)
  * 3. data ...
  */
 int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_area *source,
-                                                               int write, uint32_t addr, int count, uint32_t *buf)
+                                                               int write_t, uint32_t addr, int count, uint32_t *buf)
 {
        uint32_t handler_code[] = {
                /* caution when editing, table is modified below */
@@ -973,7 +974,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
        if (source->size < MIPS32_FASTDATA_HANDLER_SIZE)
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
-       if (write)
+       if (write_t)
        {
                handler_code[8] = MIPS32_LW(11,0,8);    /* load data from probe at fastdata area */
                handler_code[9] = MIPS32_SW(11,0,9);    /* store data to RAM @ r9 */
@@ -985,7 +986,12 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
        }
 
        /* write program into RAM */
-       mips32_pracc_write_mem32(ejtag_info, source->address, ARRAY_SIZE(handler_code), handler_code);
+       if (write_t != ejtag_info->fast_access_save)
+       {
+               mips32_pracc_write_mem32(ejtag_info, source->address, ARRAY_SIZE(handler_code), handler_code);
+               /* save previous operation to speed to any consecutive read/writes */
+               ejtag_info->fast_access_save = write_t;
+       }
 
        LOG_DEBUG("%s using 0x%.8" PRIx32 " for write handler", __func__, source->address);
 
@@ -1030,7 +1036,7 @@ int mips32_pracc_fastdata_xfer(struct mips_ejtag *ejtag_info, struct working_are
        for (i = 0; i < count; i++)
        {
                /* Send the data out using fastdata (clears the access pending bit) */
-               if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write, buf++)) != ERROR_OK)
+               if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++)) != ERROR_OK)
                        return retval;
        }