+// SPDX-License-Identifier: GPL-2.0-or-later
+
/***************************************************************************
* Copyright (C) 2008 by John McCarthy *
* jgmcc@magma.ca *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2008 by David T.L. Wong *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#endif
#include "mips32_dmaacc.h"
+#include <helper/time_support.h>
static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info,
uint32_t addr, int count, uint8_t *buf);
uint32_t addr, int count, uint32_t *buf);
static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info,
- uint32_t addr, int count, uint8_t *buf);
+ uint32_t addr, int count, const uint8_t *buf);
static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info,
- uint32_t addr, int count, uint16_t *buf);
+ uint32_t addr, int count, const uint16_t *buf);
static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
- uint32_t addr, int count, uint32_t *buf);
+ uint32_t addr, int count, const uint32_t *buf);
/*
* The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
* displaying/modifying memory and memory mapped registers.
*/
+static int ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info)
+{
+ uint32_t ejtag_ctrl;
+ int64_t start = timeval_ms();
+
+ do {
+ if (timeval_ms() - start > 1000) {
+ LOG_ERROR("DMA time out");
+ return -ETIMEDOUT;
+ }
+ ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
+ mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+ } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ return 0;
+}
+
static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
{
uint32_t v;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Read Data */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
/* Wait for DSTRT to Clear */
- do {
- ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
- mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+ ejtag_dma_dstrt_poll(ejtag_info);
/* Clear DMA & Check DERR */
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
return ERROR_OK;
}
-int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, const void *buf)
{
switch (size) {
case 1:
- return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t *)buf);
+ return mips32_dmaacc_write_mem8(ejtag_info, addr, count, buf);
case 2:
- return mips32_dmaacc_write_mem16(ejtag_info, addr, count, (uint16_t *)buf);
+ return mips32_dmaacc_write_mem16(ejtag_info, addr, count, buf);
case 4:
- return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t *)buf);
+ return mips32_dmaacc_write_mem32(ejtag_info, addr, count, buf);
}
return ERROR_OK;
}
-static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint32_t *buf)
{
int i;
int retval;
return ERROR_OK;
}
-static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint16_t *buf)
{
int i;
int retval;
return ERROR_OK;
}
-static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint8_t *buf)
{
int i;
int retval;