MIPS: remove unused arg from mips_ejtag_set_instr

[fw/openocd] / src / target / mips32_dmaacc.c

diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index cd73d6e28097227a85b206062db4ee9030a7d2b5..7d3c2dabab13774120a03f575ffca295f3c1d0d6 100644 (file)
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -39,7 +39,7 @@
  * displaying/modifying memory and memory mapped registers.
  */
 
-static int ejtag_dma_read(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t *data)
+static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -49,11 +49,11 @@ begin_ejtag_dma_read:
 
        /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Read & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -64,11 +64,11 @@ begin_ejtag_dma_read:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Read Data */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, data);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -85,7 +85,7 @@ begin_ejtag_dma_read:
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint16_t *data)
+static int ejtag_dma_read_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint16_t *data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -95,11 +95,11 @@ begin_ejtag_dma_read_h:
 
        /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Read & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -110,11 +110,11 @@ begin_ejtag_dma_read_h:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Read Data */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -137,7 +137,7 @@ begin_ejtag_dma_read_h:
        return ERROR_OK;
 }
 
-static int ejtag_dma_read_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint8_t *data)
+static int ejtag_dma_read_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint8_t *data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -147,11 +147,11 @@ begin_ejtag_dma_read_b:
 
        /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Read & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DRWN | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -162,11 +162,11 @@ begin_ejtag_dma_read_b:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Read Data */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -191,7 +191,7 @@ begin_ejtag_dma_read_b:
                case 2:
                        *data = (v >> 16) & 0xff;
                        break;
-               case 3: 
+               case 3:
                        *data = (v >> 24) & 0xff;
                        break;
        }
@@ -199,7 +199,7 @@ begin_ejtag_dma_read_b:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -209,16 +209,16 @@ begin_ejtag_dma_write:
 
        /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Write & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_WORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -229,7 +229,7 @@ begin_ejtag_dma_write:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -246,7 +246,7 @@ begin_ejtag_dma_write:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_h(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_h(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -260,16 +260,16 @@ begin_ejtag_dma_write_h:
 
        /* Setup Address */
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Write & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_HALFWORD | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -280,7 +280,7 @@ begin_ejtag_dma_write_h:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl  & EJTAG_CTRL_DERR)
@@ -297,7 +297,7 @@ begin_ejtag_dma_write_h:
        return ERROR_OK;
 }
 
-static int ejtag_dma_write_b(mips_ejtag_t *ejtag_info, uint32_t addr, uint32_t data)
+static int ejtag_dma_write_b(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t data)
 {
        uint32_t v;
        uint32_t ejtag_ctrl;
@@ -312,16 +312,16 @@ begin_ejtag_dma_write_b:
 
        /*  Setup Address*/
        v = addr;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Setup Data */
        v = data;
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
        mips_ejtag_drscan_32(ejtag_info, &v);
 
        /* Initiate DMA Write & set DSTRT */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = EJTAG_CTRL_DMAACC | EJTAG_CTRL_DMA_BYTE | EJTAG_CTRL_DSTRT | ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
@@ -332,7 +332,7 @@ begin_ejtag_dma_write_b:
        } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
 
        /* Clear DMA & Check DERR */
-       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+       mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
        ejtag_ctrl = ejtag_info->ejtag_ctrl;
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
        if (ejtag_ctrl & EJTAG_CTRL_DERR)
@@ -349,7 +349,7 @@ begin_ejtag_dma_write_b:
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_read_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
        switch (size)
        {
@@ -364,46 +364,46 @@ int mips32_dmaacc_read_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, in
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int     retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_read(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_read(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+int mips32_dmaacc_read_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_read_h(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_read_h(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_read_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_read_b(ejtag_info, addr+i*sizeof(*buf), &buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_read_b(ejtag_info, addr + i*sizeof(*buf), &buf[i])) != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 {
        switch (size)
        {
@@ -418,39 +418,39 @@ int mips32_dmaacc_write_mem(mips_ejtag_t *ejtag_info, uint32_t addr, int size, i
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem32(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
 {
        int i;
        int retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_write(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_write(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem16(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
 {
        int i;
        int retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_write_h(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_write_h(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
                        return retval;
        }
 
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem8(mips_ejtag_t *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
 {
        int i;
        int retval;
 
-       for (i=0; i<count; i++) {
-               if ((retval = ejtag_dma_write_b(ejtag_info, addr+i*sizeof(*buf), buf[i])) != ERROR_OK)
+       for (i = 0; i < count; i++) {
+               if ((retval = ejtag_dma_write_b(ejtag_info, addr + i*sizeof(*buf), buf[i])) != ERROR_OK)
                        return retval;
        }