target/cortex_m: faster reading of all CPU registers

[fw/openocd] / src / target / mips32_dmaacc.c

diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c
index 308507b488464b08f519edbf9ec362b827b0c47f..220ea94f92405dc0671b1b84c2f7643397341591 100644 (file)
--- a/src/target/mips32_dmaacc.c
+++ b/src/target/mips32_dmaacc.c
@@ -18,9 +18,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -28,6 +26,7 @@
 #endif
 
 #include "mips32_dmaacc.h"
+#include <helper/time_support.h>
 
 static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info,
                uint32_t addr, int count, uint8_t *buf);
@@ -37,11 +36,11 @@ static int mips32_dmaacc_read_mem32(struct mips_ejtag *ejtag_info,
                uint32_t addr, int count, uint32_t *buf);
 
 static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info,
-               uint32_t addr, int count, uint8_t *buf);
+               uint32_t addr, int count, const uint8_t *buf);
 static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info,
-               uint32_t addr, int count, uint16_t *buf);
+               uint32_t addr, int count, const uint16_t *buf);
 static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
-               uint32_t addr, int count, uint32_t *buf);
+               uint32_t addr, int count, const uint32_t *buf);
 
 /*
  * The following logic shamelessly cloned from HairyDairyMaid's wrt54g_debrick
@@ -53,6 +52,22 @@ static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info,
  * displaying/modifying memory and memory mapped registers.
  */
 
+static int ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info)
+{
+       uint32_t ejtag_ctrl;
+       int64_t start = timeval_ms();
+
+       do {
+               if (timeval_ms() - start > 1000) {
+                       LOG_ERROR("DMA time out");
+                       return -ETIMEDOUT;
+               }
+               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
+               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       return 0;
+}
+
 static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data)
 {
        uint32_t v;
@@ -72,10 +87,7 @@ begin_ejtag_dma_read:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -117,10 +129,7 @@ begin_ejtag_dma_read_h:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -167,10 +176,7 @@ begin_ejtag_dma_read_b:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Read Data */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA);
@@ -232,10 +238,7 @@ begin_ejtag_dma_write:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
@@ -281,10 +284,7 @@ begin_ejtag_dma_write_h:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
@@ -331,10 +331,7 @@ begin_ejtag_dma_write_b:
        mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
 
        /* Wait for DSTRT to Clear */
-       do {
-               ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl;
-               mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-       } while (ejtag_ctrl & EJTAG_CTRL_DSTRT);
+       ejtag_dma_dstrt_poll(ejtag_info);
 
        /* Clear DMA & Check DERR */
        mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
@@ -408,21 +405,21 @@ static int mips32_dmaacc_read_mem8(struct mips_ejtag *ejtag_info, uint32_t addr,
        return ERROR_OK;
 }
 
-int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
+int mips32_dmaacc_write_mem(struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, const void *buf)
 {
        switch (size) {
                case 1:
-                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, (uint8_t *)buf);
+                       return mips32_dmaacc_write_mem8(ejtag_info, addr, count, buf);
                case 2:
-                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count, (uint16_t *)buf);
+                       return mips32_dmaacc_write_mem16(ejtag_info, addr, count, buf);
                case 4:
-                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, (uint32_t *)buf);
+                       return mips32_dmaacc_write_mem32(ejtag_info, addr, count, buf);
        }
 
        return ERROR_OK;
 }
 
-static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint32_t *buf)
+static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint32_t *buf)
 {
        int i;
        int retval;
@@ -436,7 +433,7 @@ static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, uint32_t add
        return ERROR_OK;
 }
 
-static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint16_t *buf)
+static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint16_t *buf)
 {
        int i;
        int retval;
@@ -450,7 +447,7 @@ static int mips32_dmaacc_write_mem16(struct mips_ejtag *ejtag_info, uint32_t add
        return ERROR_OK;
 }
 
-static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, uint8_t *buf)
+static int mips32_dmaacc_write_mem8(struct mips_ejtag *ejtag_info, uint32_t addr, int count, const uint8_t *buf)
 {
        int i;
        int retval;