target/armv7m: rework Cortex-M register handling part 3

[fw/openocd] / src / target / mips32.h

diff --git a/src/target/mips32.h b/src/target/mips32.h
index 4dc164e1b3f61528414f3d51b4f9dd78e8e6b78b..f107b57d532317ca30bcae32791550a8edb2cc80 100644 (file)
--- a/src/target/mips32.h
+++ b/src/target/mips32.h
@@ -42,7 +42,7 @@
 /** Returns the kernel segment base of a given address */
 #define KSEGX(a)               ((a) & 0xe0000000)
 
-/** CP0 CONFIG regites fields */
+/** CP0 CONFIG register fields */
 #define MIPS32_CONFIG0_KU_SHIFT 25
 #define MIPS32_CONFIG0_KU_MASK (0x7 << MIPS32_CONFIG0_KU_SHIFT)