MIPS32NUMCOREREGS
};
-typedef struct mips32_comparator_s
+struct mips32_comparator
{
int used;
//int type;
uint32_t bp_value;
uint32_t reg_address;
-} mips32_comparator_t;
+};
-typedef struct mips32_common_s
+struct mips32_common
{
uint32_t common_magic;
void *arch_info;
- reg_cache_t *core_cache;
- mips_ejtag_t ejtag_info;
+ struct reg_cache *core_cache;
+ struct mips_ejtag ejtag_info;
uint32_t core_regs[MIPS32NUMCOREREGS];
int bp_scanned;
int num_data_bpoints;
int num_inst_bpoints_avail;
int num_data_bpoints_avail;
- mips32_comparator_t *inst_break_list;
- mips32_comparator_t *data_break_list;
+ struct mips32_comparator *inst_break_list;
+ struct mips32_comparator *data_break_list;
/* register cache to processor synchronization */
int (*read_core_reg)(struct target_s *target, int num);
int (*write_core_reg)(struct target_s *target, int num);
-} mips32_common_t;
+};
-typedef struct mips32_core_reg_s
+struct mips32_core_reg
{
uint32_t num;
struct target_s *target;
- mips32_common_t *mips32_common;
-} mips32_core_reg_t;
+ struct mips32_common *mips32_common;
+};
#define MIPS32_OP_BEQ 0x04
#define MIPS32_OP_BNE 0x05
int mips32_arch_state(struct target_s *target);
int mips32_init_arch_info(target_t *target,
- mips32_common_t *mips32, struct jtag_tap *tap);
+ struct mips32_common *mips32, struct jtag_tap *tap);
int mips32_restore_context(target_t *target);
int mips32_save_context(target_t *target);
-reg_cache_t *mips32_build_reg_cache(target_t *target);
+struct reg_cache *mips32_build_reg_cache(target_t *target);
int mips32_run_algorithm(struct target_s *target,
int num_mem_params, struct mem_param *mem_params,
int mips32_invalidate_core_regs(target_t *target);
int mips32_get_gdb_reg_list(target_t *target,
- reg_t **reg_list[], int *reg_list_size);
+ struct reg **reg_list[], int *reg_list_size);
#endif /*MIPS32_H*/