{
target->arch_info = mips32;
mips32->common_magic = MIPS32_COMMON_MAGIC;
+ mips32->fast_data_area = NULL;
/* has breakpoint/watchpint unit been scanned */
mips32->bp_scanned = 0;
}
pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32);
- if (pc != exit_point)
+ if (exit_point && (pc != exit_point))
{
LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
}
/* refresh core register cache */
- for (unsigned i = 0; i < MIPS32NUMCOREREGS; i++)
+ for (i = 0; i < MIPS32NUMCOREREGS; i++)
{
if (!mips32->core_cache->reg_list[i].valid)
mips32->read_core_reg(target, i);
}
}
- for (int i = 0; i < num_reg_params; i++)
+ for (i = 0; i < num_reg_params; i++)
{
struct reg *reg = register_get_by_name(mips32->core_cache, reg_params[i].reg_name, 0);
int retval;
uint32_t i;
+ /* see contib/loaders/checksum/mips32.s for src */
+
static const uint32_t mips_crc_code[] =
{
0x248C0000, /* addiu $t4, $a0, 0 */