Fix logically inverted comment

[fw/openocd] / src / target / mips32.c

diff --git a/src/target/mips32.c b/src/target/mips32.c
index 4d3705beaa7502eaf557886468da5f881d1f7f15..c109ed20fffd67e220716035a6e49e4c14be23eb 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -27,18 +27,14 @@
 #endif
 
 #include "mips32.h"
-#include "jtag.h"
-#include "log.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 char* mips32_core_reg_list[] =
 {
-       "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
-       "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
-       "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
-       "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
+       "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
+       "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
+       "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
+       "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra",
        "status", "lo", "hi", "badvaddr", "cause", "pc"
 };
 
@@ -85,18 +81,16 @@ mips32_core_reg_t mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] =
        {37, NULL, NULL},
 };
 
-u8 mips32_gdb_dummy_fsr_value[] = {0, 0, 0, 0};
+/* number of mips dummy fp regs fp0 - fp31 + fsr and fir
+ * we also add 18 unknown registers to handle gdb requests */
 
-reg_t mips32_gdb_dummy_fsr_reg =
-{
-       "GDB dummy floating-point status register", mips32_gdb_dummy_fsr_value, 0, 1, 32, NULL, 0, NULL, 0
-};
+#define MIPS32NUMFPREGS 34 + 18
 
-u8 mips32_gdb_dummy_fir_value[] = {0, 0, 0, 0};
+u8 mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0};
 
-reg_t mips32_gdb_dummy_fir_reg =
+reg_t mips32_gdb_dummy_fp_reg =
 {
-       "GDB dummy floating-point register", mips32_gdb_dummy_fir_value, 0, 1, 32, NULL, 0, NULL, 0
+       "GDB dummy floating-point register", mips32_gdb_dummy_fp_value, 0, 1, 32, NULL, 0, NULL, 0
 };
 
 int mips32_core_reg_arch_type = -1;
@@ -198,8 +192,8 @@ int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
        mips32_common_t *mips32 = target->arch_info;
        int i;
        
-       /* include fsr/fir reg */
-       *reg_list_size = MIPS32NUMCOREREGS + 2;
+       /* include floating point registers */
+       *reg_list_size = MIPS32NUMCOREREGS + MIPS32NUMFPREGS;
        *reg_list = malloc(sizeof(reg_t*) * (*reg_list_size));
        
        for (i = 0; i < MIPS32NUMCOREREGS; i++)
@@ -208,9 +202,11 @@ int mips32_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
        }
        
        /* add dummy floating points regs */
-       (*reg_list)[38] = &mips32_gdb_dummy_fsr_reg;
-       (*reg_list)[39] = &mips32_gdb_dummy_fir_reg;
-       
+       for (i = MIPS32NUMCOREREGS; i < (MIPS32NUMCOREREGS + MIPS32NUMFPREGS); i++)
+       {
+               (*reg_list)[i] = &mips32_gdb_dummy_fp_reg;
+       }
+
        return ERROR_OK;
 }
 
@@ -290,8 +286,7 @@ reg_cache_t *mips32_build_reg_cache(target_t *target)
        if (mips32_core_reg_arch_type == -1)
                mips32_core_reg_arch_type = register_reg_arch_type(mips32_get_core_reg, mips32_set_core_reg);
 
-       register_init_dummy(&mips32_gdb_dummy_fsr_reg);
-       register_init_dummy(&mips32_gdb_dummy_fir_reg);
+       register_init_dummy(&mips32_gdb_dummy_fp_reg);
 
        /* Build the process context cache */ 
        cache->name = "mips32 registers";
@@ -320,7 +315,7 @@ reg_cache_t *mips32_build_reg_cache(target_t *target)
        return cache;
 }
 
-int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, int chain_pos, const char *variant)
+int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap)
 {
        target->arch_info = mips32;
        mips32->common_magic = MIPS32_COMMON_MAGIC;
@@ -329,7 +324,7 @@ int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, int chain_p
        mips32->bp_scanned = 0;
        mips32->data_break_list = NULL;
        
-       mips32->ejtag_info.chain_pos = chain_pos;
+       mips32->ejtag_info.tap = tap;
        mips32->read_core_reg = mips32_read_core_reg;
        mips32->write_core_reg = mips32_write_core_reg;