semihosting: add semihosting handlers to AArch64

[fw/openocd] / src / target / mips32.c

diff --git a/src/target/mips32.c b/src/target/mips32.c
index 9cb24a4472710d9ccab0151d2843c3c58e3558be..5260032164e3fb59f005003fa0328fce303409b6 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -909,7 +909,7 @@ static int mips32_verify_pointer(struct command_invocation *cmd,
                struct mips32_common *mips32)
 {
        if (mips32->common_magic != MIPS32_COMMON_MAGIC) {
-               command_print(cmd->ctx, "target is not an MIPS32");
+               command_print(cmd, "target is not an MIPS32");
                return ERROR_TARGET_INVALID;
        }
        return ERROR_OK;
@@ -932,7 +932,7 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
                return retval;
 
        if (target->state != TARGET_HALTED) {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_OK;
        }
 
@@ -949,12 +949,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
 
                        retval = mips32_cp0_read(ejtag_info, &value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
+                               command_print(CMD,
                                                "couldn't access reg %" PRIi32,
                                                cp0_reg);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
 
                } else if (CMD_ARGC == 3) {
@@ -962,12 +962,12 @@ COMMAND_HANDLER(mips32_handle_cp0_command)
                        COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], value);
                        retval = mips32_cp0_write(ejtag_info, value, cp0_reg, cp0_sel);
                        if (retval != ERROR_OK) {
-                               command_print(CMD_CTX,
+                               command_print(CMD,
                                                "couldn't access cp0 reg %" PRIi32 ", select %" PRIi32,
                                                cp0_reg,  cp0_sel);
                                return ERROR_OK;
                        }
-                       command_print(CMD_CTX, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
+                       command_print(CMD, "cp0 reg %" PRIi32 ", select %" PRIi32 ": %8.8" PRIx32,
                                        cp0_reg, cp0_sel, value);
                }
        }
@@ -986,13 +986,13 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command)
        else if (CMD_ARGC > 1)
                        return ERROR_COMMAND_SYNTAX_ERROR;
 
-       command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+       command_print(CMD, "scan delay: %d nsec", ejtag_info->scan_delay);
        if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
                ejtag_info->mode = 0;
-               command_print(CMD_CTX, "running in legacy mode");
+               command_print(CMD, "running in legacy mode");
        } else {
                ejtag_info->mode = 1;
-               command_print(CMD_CTX, "running in fast queued mode");
+               command_print(CMD, "running in fast queued mode");
        }
 
        return ERROR_OK;