target: icepick: switch over to icepick_c_router

[fw/openocd] / src / target / hla_target.c

diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index abbc1b194f0eb57ee3a8ebad0413dfafc39469d4..d0be966c3a056d23d8dace6a73513482d31af0b3 100644 (file)
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -66,7 +66,7 @@ static int adapter_load_core_reg_u32(struct target *target,
        switch (num) {
        case 0 ... 18:
                /* read a normal core register */
-               retval = adapter->layout->api->read_reg(adapter->fd, num, value);
+               retval = adapter->layout->api->read_reg(adapter->handle, num, value);
 
                if (retval != ERROR_OK) {
                        LOG_ERROR("JTAG failure %i", retval);
@@ -75,11 +75,6 @@ static int adapter_load_core_reg_u32(struct target *target,
                LOG_DEBUG("load from core reg %i  value 0x%" PRIx32 "", (int)num, *value);
                break;
 
-       case ARMV7M_FPSID:
-       case ARMV7M_FPEXC:
-               *value = 0;
-               break;
-
        case ARMV7M_FPSCR:
                /* Floating-point Status and Registers */
                retval = target_write_u32(target, ARMV7M_SCS_DCRSR, 33);
@@ -88,7 +83,7 @@ static int adapter_load_core_reg_u32(struct target *target,
                retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("load from core reg %i  value 0x%" PRIx32 "", (int)num, *value);
+               LOG_DEBUG("load from FPSCR  value 0x%" PRIx32, *value);
                break;
 
        case ARMV7M_S0 ... ARMV7M_S31:
@@ -99,11 +94,8 @@ static int adapter_load_core_reg_u32(struct target *target,
                retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("load from core reg %i  value 0x%" PRIx32 "", (int)num, *value);
-               break;
-
-       case ARMV7M_D0 ... ARMV7M_D15:
-               value = 0;
+               LOG_DEBUG("load from FPU reg S%d  value 0x%" PRIx32,
+                         (int)(num - ARMV7M_S0), *value);
                break;
 
        case ARMV7M_PRIMASK:
@@ -114,7 +106,7 @@ static int adapter_load_core_reg_u32(struct target *target,
                 * in one Debug Core register.  So say r0 and r2 docs;
                 * it was removed from r1 docs, but still works.
                 */
-               retval = adapter->layout->api->read_reg(adapter->fd, 20, value);
+               retval = adapter->layout->api->read_reg(adapter->handle, 20, value);
                if (retval != ERROR_OK)
                        return retval;
 
@@ -163,7 +155,7 @@ static int adapter_store_core_reg_u32(struct target *target,
         */
        switch (num) {
        case 0 ... 18:
-               retval = adapter->layout->api->write_reg(adapter->fd, num, value);
+               retval = adapter->layout->api->write_reg(adapter->handle, num, value);
 
                if (retval != ERROR_OK) {
                        struct reg *r;
@@ -176,10 +168,6 @@ static int adapter_store_core_reg_u32(struct target *target,
                LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
                break;
 
-       case ARMV7M_FPSID:
-       case ARMV7M_FPEXC:
-               break;
-
        case ARMV7M_FPSCR:
                /* Floating-point Status and Registers */
                retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value);
@@ -188,7 +176,7 @@ static int adapter_store_core_reg_u32(struct target *target,
                retval = target_write_u32(target, ARMV7M_SCS_DCRSR, 33 | (1<<16));
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
+               LOG_DEBUG("write FPSCR value 0x%" PRIx32, value);
                break;
 
        case ARMV7M_S0 ... ARMV7M_S31:
@@ -199,10 +187,8 @@ static int adapter_store_core_reg_u32(struct target *target,
                retval = target_write_u32(target, ARMV7M_SCS_DCRSR, (num-ARMV7M_S0+64) | (1<<16));
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
-               break;
-
-       case ARMV7M_D0 ... ARMV7M_D15:
+               LOG_DEBUG("write FPU reg S%d  value 0x%" PRIx32,
+                         (int)(num - ARMV7M_S0), value);
                break;
 
        case ARMV7M_PRIMASK:
@@ -214,7 +200,7 @@ static int adapter_store_core_reg_u32(struct target *target,
                 * it was removed from r1 docs, but still works.
                 */
 
-               adapter->layout->api->read_reg(adapter->fd, 20, &reg);
+               adapter->layout->api->read_reg(adapter->handle, 20, &reg);
 
                switch (num) {
                case ARMV7M_PRIMASK:
@@ -234,7 +220,7 @@ static int adapter_store_core_reg_u32(struct target *target,
                        break;
                }
 
-               adapter->layout->api->write_reg(adapter->fd, 20, reg);
+               adapter->layout->api->write_reg(adapter->handle, 20, reg);
 
                LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
                break;
@@ -259,7 +245,7 @@ static int adapter_examine_debug_reason(struct target *target)
 static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ctrl)
 {
        uint16_t dcrdr;
-       int retval = hl_if->layout->api->read_mem(hl_if->fd,
+       int retval = hl_if->layout->api->read_mem(hl_if->handle,
                        DCB_DCRDR, 1, sizeof(dcrdr), (uint8_t *)&dcrdr);
        if (retval == ERROR_OK) {
            *ctrl = (uint8_t)dcrdr;
@@ -272,7 +258,7 @@ static int hl_dcc_read(struct hl_interface_s *hl_if, uint8_t *value, uint8_t *ct
                         * to signify we have read data */
                        /* atomically clear just the byte containing the busy bit */
                        static const uint8_t zero;
-                       retval = hl_if->layout->api->write_mem(hl_if->fd, DCB_DCRDR, 1, 1, &zero);
+                       retval = hl_if->layout->api->write_mem(hl_if->handle, DCB_DCRDR, 1, 1, &zero);
                }
        }
        return retval;
@@ -412,7 +398,7 @@ static int adapter_debug_entry(struct target *target)
        adapter_load_context(target);
 
        /* make sure we clear the vector catch bit */
-       adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
+       adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
 
        r = arm->cpsr;
        xPSR = buf_get_u32(r->value, 0, 32);
@@ -443,7 +429,7 @@ static int adapter_debug_entry(struct target *target)
 
        LOG_DEBUG("entered debug state in core mode: %s at PC 0x%08" PRIx32 ", target->state: %s",
                arm_mode_name(arm->core_mode),
-               *(uint32_t *)(arm->pc->value),
+               buf_get_u32(arm->pc->value, 0, 32),
                target_state_name(target));
 
        return retval;
@@ -456,7 +442,7 @@ static int adapter_poll(struct target *target)
        struct armv7m_common *armv7m = target_to_armv7m(target);
        enum target_state prev_target_state = target->state;
 
-       state = adapter->layout->api->state(adapter->fd);
+       state = adapter->layout->api->state(adapter->handle);
 
        if (state == TARGET_UNKNOWN) {
                LOG_ERROR("jtag status contains invalid mode value - communication failure");
@@ -483,7 +469,7 @@ static int adapter_poll(struct target *target)
                        target_call_event_callbacks(target, TARGET_EVENT_HALTED);
                }
 
-               LOG_DEBUG("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+               LOG_DEBUG("halted: PC: 0x%08" PRIx32, buf_get_u32(armv7m->arm.pc->value, 0, 32));
        }
 
        return ERROR_OK;
@@ -505,22 +491,22 @@ static int adapter_assert_reset(struct target *target)
        if ((jtag_reset_config & RESET_HAS_SRST) &&
            (jtag_reset_config & RESET_SRST_NO_GATING)) {
                jtag_add_reset(0, 1);
-               res = adapter->layout->api->assert_srst(adapter->fd, 0);
+               res = adapter->layout->api->assert_srst(adapter->handle, 0);
                srst_asserted = true;
        }
 
-       adapter->layout->api->write_debug_reg(adapter->fd, DCB_DHCSR, DBGKEY|C_DEBUGEN);
+       adapter->layout->api->write_debug_reg(adapter->handle, DCB_DHCSR, DBGKEY|C_DEBUGEN);
 
        /* only set vector catch if halt is requested */
        if (target->reset_halt)
-               adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA|VC_CORERESET);
+               adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA|VC_CORERESET);
        else
-               adapter->layout->api->write_debug_reg(adapter->fd, DCB_DEMCR, TRCENA);
+               adapter->layout->api->write_debug_reg(adapter->handle, DCB_DEMCR, TRCENA);
 
        if (jtag_reset_config & RESET_HAS_SRST) {
                if (!srst_asserted) {
                        jtag_add_reset(0, 1);
-                       res = adapter->layout->api->assert_srst(adapter->fd, 0);
+                       res = adapter->layout->api->assert_srst(adapter->handle, 0);
                }
                if (res == ERROR_COMMAND_NOTFOUND)
                        LOG_ERROR("Hardware srst not supported, falling back to software reset");
@@ -532,10 +518,10 @@ static int adapter_assert_reset(struct target *target)
 
        if (use_srst_fallback) {
                /* stlink v1 api does not support hardware srst, so we use a software reset fallback */
-               adapter->layout->api->write_debug_reg(adapter->fd, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
+               adapter->layout->api->write_debug_reg(adapter->handle, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ);
        }
 
-       res = adapter->layout->api->reset(adapter->fd);
+       res = adapter->layout->api->reset(adapter->handle);
 
        if (res != ERROR_OK)
                return res;
@@ -562,7 +548,7 @@ static int adapter_deassert_reset(struct target *target)
        LOG_DEBUG("%s", __func__);
 
        if (jtag_reset_config & RESET_HAS_SRST)
-               adapter->layout->api->assert_srst(adapter->fd, 1);
+               adapter->layout->api->assert_srst(adapter->handle, 1);
 
        /* virtual deassert reset, we need it for the internal
         * jtag state machine
@@ -589,7 +575,7 @@ static int adapter_halt(struct target *target)
        if (target->state == TARGET_UNKNOWN)
                LOG_WARNING("target was in unknown state when halt was requested");
 
-       res = adapter->layout->api->halt(adapter->fd);
+       res = adapter->layout->api->halt(adapter->handle);
 
        if (res != ERROR_OK)
                return res;
@@ -610,7 +596,7 @@ static int adapter_resume(struct target *target, int current,
        struct breakpoint *breakpoint = NULL;
        struct reg *pc;
 
-       LOG_DEBUG("%s %d 0x%08x %d %d", __func__, current, address,
+       LOG_DEBUG("%s %d 0x%08" PRIx32 " %d %d", __func__, current, address,
                        handle_breakpoints, debug_execution);
 
        if (target->state != TARGET_HALTED) {
@@ -658,12 +644,12 @@ static int adapter_resume(struct target *target, int current,
                /* Single step past breakpoint at current address */
                breakpoint = breakpoint_find(target, resume_pc);
                if (breakpoint) {
-                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %d)",
+                       LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (ID: %" PRIu32 ")",
                                        breakpoint->address,
                                        breakpoint->unique_id);
                        cortex_m_unset_breakpoint(target, breakpoint);
 
-                       res = adapter->layout->api->step(adapter->fd);
+                       res = adapter->layout->api->step(adapter->handle);
 
                        if (res != ERROR_OK)
                                return res;
@@ -672,7 +658,7 @@ static int adapter_resume(struct target *target, int current,
                }
        }
 
-       res = adapter->layout->api->run(adapter->fd);
+       res = adapter->layout->api->run(adapter->handle);
 
        if (res != ERROR_OK)
                return res;
@@ -735,7 +721,7 @@ static int adapter_step(struct target *target, int current,
 
        target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
 
-       res = adapter->layout->api->step(adapter->fd);
+       res = adapter->layout->api->step(adapter->handle);
 
        if (res != ERROR_OK)
                return res;
@@ -749,7 +735,7 @@ static int adapter_step(struct target *target, int current,
        adapter_debug_entry(target);
        target_call_event_callbacks(target, TARGET_EVENT_HALTED);
 
-       LOG_INFO("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
+       LOG_INFO("halted: PC: 0x%08" PRIx32, buf_get_u32(armv7m->arm.pc->value, 0, 32));
 
        return ERROR_OK;
 }
@@ -763,9 +749,9 @@ static int adapter_read_memory(struct target *target, uint32_t address,
        if (!count || !buffer)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
-       LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
+       LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
 
-       return adapter->layout->api->read_mem(adapter->fd, address, size, count, buffer);
+       return adapter->layout->api->read_mem(adapter->handle, address, size, count, buffer);
 }
 
 static int adapter_write_memory(struct target *target, uint32_t address,
@@ -777,15 +763,18 @@ static int adapter_write_memory(struct target *target, uint32_t address,
        if (!count || !buffer)
                return ERROR_COMMAND_SYNTAX_ERROR;
 
-       LOG_DEBUG("%s 0x%08x %d %d", __func__, address, size, count);
+       LOG_DEBUG("%s 0x%08" PRIx32 " %" PRIu32 " %" PRIu32, __func__, address, size, count);
 
-       return adapter->layout->api->write_mem(adapter->fd, address, size, count, buffer);
+       return adapter->layout->api->write_mem(adapter->handle, address, size, count, buffer);
 }
 
 static const struct command_registration adapter_command_handlers[] = {
        {
                .chain = arm_command_handlers,
        },
+       {
+               .chain = armv7m_trace_command_handlers,
+       },
        COMMAND_REGISTRATION_DONE
 };
 
@@ -794,6 +783,7 @@ struct target_type hla_target = {
        .deprecated_name = "stm32_stlink",
 
        .init_target = adapter_init_target,
+       .deinit_target = cortex_m_deinit_target,
        .target_create = adapter_target_create,
        .examine = cortex_m_examine,
        .commands = adapter_command_handlers,