arm_adi_v5: simplify handling of AP type

[fw/openocd] / src / target / hla_target.c

diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index cd57dd207d0eb6415399f22b2eb82a0b2b65b668..c67c9cc897633f4827c899c74fb822b4ebb71104 100644 (file)
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -37,11 +37,12 @@
 #include "target_type.h"
 #include "armv7m.h"
 #include "cortex_m.h"
+#include "arm_adi_v5.h"
 #include "arm_semihosting.h"
 #include "target_request.h"
 #include <rtt/rtt.h>
 
-#define savedDCRDR  dbgbase  /* FIXME: using target->dbgbase to preserve DCRDR */
+#define SAVED_DCRDR  dbgbase  /* FIXME: using target->dbgbase to preserve DCRDR */
 
 #define ARMV7M_SCS_DCRSR       DCB_DCRSR
 #define ARMV7M_SCS_DCRDR       DCB_DCRDR
@@ -179,7 +180,7 @@ static int adapter_init_arch_info(struct target *target,
        armv7m->store_core_reg_u32 = adapter_store_core_reg_u32;
 
        armv7m->examine_debug_reason = adapter_examine_debug_reason;
-       armv7m->stlink = true;
+       armv7m->is_hla_target = true;
 
        target_register_timer_callback(hl_handle_target_request, 1,
                TARGET_TIMER_TYPE_PERIODIC, target);
@@ -202,13 +203,13 @@ static int adapter_target_create(struct target *target,
 {
        LOG_DEBUG("%s", __func__);
        struct adiv5_private_config *pc = target->private_config;
-       if (pc != NULL && pc->ap_num > 0) {
+       if (pc && pc->ap_num > 0) {
                LOG_ERROR("hla_target: invalid parameter -ap-num (> 0)");
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        struct cortex_m_common *cortex_m = calloc(1, sizeof(struct cortex_m_common));
-       if (cortex_m == NULL) {
+       if (!cortex_m) {
                LOG_ERROR("No memory creating target");
                return ERROR_FAIL;
        }
@@ -243,7 +244,7 @@ static int adapter_debug_entry(struct target *target)
        int retval;
 
        /* preserve the DCRDR across halts */
-       retval = target_read_u32(target, DCB_DCRDR, &target->savedDCRDR);
+       retval = target_read_u32(target, DCB_DCRDR, &target->SAVED_DCRDR);
        if (retval != ERROR_OK)
                return retval;
 
@@ -405,7 +406,7 @@ static int hl_deassert_reset(struct target *target)
        if (jtag_reset_config & RESET_HAS_SRST)
                adapter_deassert_reset();
 
-       target->savedDCRDR = 0;  /* clear both DCC busy bits on initial resume */
+       target->SAVED_DCRDR = 0;  /* clear both DCC busy bits on initial resume */
 
        return target->reset_halt ? ERROR_OK : target_resume(target, 1, 0, 0, 0);
 }
@@ -481,8 +482,8 @@ static int adapter_resume(struct target *target, int current,
 
        armv7m_restore_context(target);
 
-       /* restore savedDCRDR */
-       res = target_write_u32(target, DCB_DCRDR, target->savedDCRDR);
+       /* restore SAVED_DCRDR */
+       res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR);
        if (res != ERROR_OK)
                return res;
 
@@ -564,8 +565,8 @@ static int adapter_step(struct target *target, int current,
 
        armv7m_restore_context(target);
 
-       /* restore savedDCRDR */
-       res = target_write_u32(target, DCB_DCRDR, target->savedDCRDR);
+       /* restore SAVED_DCRDR */
+       res = target_write_u32(target, DCB_DCRDR, target->SAVED_DCRDR);
        if (res != ERROR_OK)
                return res;