- added checksum_memory and blank_check_memory for xscale
[fw/openocd] / src / target / feroceon.c
index bad110e061a41c8ec84846b619bb205a7868ad1a..a912dbd365c2171320ce787a2abb77151ca388d2 100644 (file)
@@ -54,7 +54,7 @@
 #include <stdlib.h>
 #include <string.h>
 
-
+int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target);
 int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffer);
 int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
@@ -76,7 +76,6 @@ target_type_t feroceon_target =
        .assert_reset = arm7_9_assert_reset,
        .deassert_reset = arm7_9_deassert_reset,
        .soft_reset_halt = arm926ejs_soft_reset_halt,
-       .prepare_reset_halt = arm7_9_prepare_reset_halt,
        
        .get_gdb_reg_list = armv4_5_get_gdb_reg_list,
 
@@ -84,6 +83,7 @@ target_type_t feroceon_target =
        .write_memory = arm926ejs_write_memory,
        .bulk_write_memory = feroceon_bulk_write_memory,
        .checksum_memory = arm7_9_checksum_memory,
+       .blank_check_memory = arm7_9_blank_check_memory,
        
        .run_algorithm = armv4_5_run_algorithm,
 
@@ -95,6 +95,7 @@ target_type_t feroceon_target =
        .register_commands = arm926ejs_register_commands,
        .target_command = feroceon_target_command,
        .init_target = feroceon_init_target,
+       .examine = feroceon_examine,
        .quit = feroceon_quit
 };
 
@@ -547,9 +548,9 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                buffer += 4;
        }
 
-       target->type->halt(target);
+       target_halt(target);
        while (target->state != TARGET_HALTED)
-               target->type->poll(target);
+               target_poll(target);
 
        /* restore target state */
        for (i = 0; i <= 5; i++)
@@ -568,32 +569,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
 
 int feroceon_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
 {
-       armv4_5_common_t *armv4_5;
-       arm7_9_common_t *arm7_9;
-
        arm9tdmi_init_target(cmd_ctx, target);
-
-       armv4_5 = target->arch_info;
-       arm7_9 = armv4_5->arch_info;
-
-       /* the COMMS_CTRL bits are all contiguous */
-       if (buf_get_u32(arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL].value, 2, 4) != 6)
-               LOG_ERROR("unexpected Feroceon EICE version signature");
-
-       arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].size = 6; 
-       arm7_9->eice_cache->reg_list[EICE_DBG_STAT].size = 5; 
-       arm7_9->has_monitor_mode = 1;
-
-       /* vector catch reg is not initialized on reset */
-       embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_VEC_CATCH], 0);
-
-       /* clear monitor mode, enable comparators */
-       embeddedice_read_reg(&arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]);
-       jtag_execute_queue(); 
-       buf_set_u32(arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].value, 4, 1, 0);
-       buf_set_u32(arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].value, 5, 1, 0); 
-       embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]);
-
        return ERROR_OK;
 }
 
@@ -660,3 +636,38 @@ int feroceon_target_command(struct command_context_s *cmd_ctx, char *cmd, char *
 
        return ERROR_OK;
 }
+
+
+int feroceon_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+{
+       armv4_5_common_t *armv4_5;
+       arm7_9_common_t *arm7_9;
+       int retval;
+
+       retval = arm9tdmi_examine(cmd_ctx, target);
+       if (retval!=ERROR_OK)
+               return retval;
+                       
+       armv4_5 = target->arch_info;
+       arm7_9 = armv4_5->arch_info;
+       
+       /* the COMMS_CTRL bits are all contiguous */
+       if (buf_get_u32(arm7_9->eice_cache->reg_list[EICE_COMMS_CTRL].value, 2, 4) != 6)
+               LOG_ERROR("unexpected Feroceon EICE version signature");
+       
+       arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].size = 6; 
+       arm7_9->eice_cache->reg_list[EICE_DBG_STAT].size = 5; 
+       arm7_9->has_monitor_mode = 1;
+       
+       /* vector catch reg is not initialized on reset */
+       embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_VEC_CATCH], 0);
+       
+       /* clear monitor mode, enable comparators */
+       embeddedice_read_reg(&arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]);
+       jtag_execute_queue(); 
+       buf_set_u32(arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].value, 4, 1, 0);
+       buf_set_u32(arm7_9->eice_cache->reg_list[EICE_DBG_CTRL].value, 5, 1, 0); 
+       embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]);
+       
+       return ERROR_OK;
+}