#include "config.h"
#endif
-#include <string.h>
-
#include "etm.h"
#include "etb.h"
-
-#include "armv4_5.h"
+#include "image.h"
#include "arm7_9_common.h"
#include "arm_disassembler.h"
-#include "arm_simulator.h"
-#include "log.h"
-#include "arm_jtag.h"
-#include "types.h"
-#include "binarybuffer.h"
-#include "target.h"
-#include "register.h"
-#include "jtag.h"
-#include "fileio.h"
-
-#include <stdlib.h>
/* ETM register access functionality
*
*/
-bitfield_desc_t etm_comms_ctrl_bitfield_desc[] =
+#if 0
+static bitfield_desc_t etm_comms_ctrl_bitfield_desc[] =
{
{"R", 1},
{"W", 1},
{"reserved", 26},
{"version", 4}
};
+#endif
-int etm_reg_arch_info[] =
+static int etm_reg_arch_info[] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
};
-int etm_reg_arch_size_info[] =
+static int etm_reg_arch_size_info[] =
{
32, 32, 17, 8, 3, 9, 32, 16,
17, 26, 25, 8, 17, 32, 32, 17,
17, 17, 17, 17, 32, 32, 32, 32
};
-char* etm_reg_list[] =
+static char* etm_reg_list[] =
{
"ETM_CTRL",
"ETM_CONFIG",
"ETM_CONTEXTID_COMPARATOR_MASK"
};
-int etm_reg_arch_type = -1;
+static int etm_reg_arch_type = -1;
-int etm_get_reg(reg_t *reg);
-int etm_set_reg(reg_t *reg, u32 value);
-int etm_set_reg_w_exec(reg_t *reg, u8 *buf);
+static int etm_get_reg(reg_t *reg);
-int etm_write_reg(reg_t *reg, u32 value);
-int etm_read_reg(reg_t *reg);
-
-command_t *etm_cmd = NULL;
+static command_t *etm_cmd = NULL;
reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_context_t *etm_ctx)
{
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
etm_context_t *etm_ctx = arm7_9->etm_ctx;
reg_t *etm_ctrl_reg = &arm7_9->etm_ctx->reg_cache->reg_list[ETM_CTRL];
+
/* initialize some ETM control register settings */
etm_get_reg(etm_ctrl_reg);
etm_ctrl_value = buf_get_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size);
int etm_get_reg(reg_t *reg)
{
int retval;
+
if ((retval = etm_read_reg(reg)) != ERROR_OK)
{
LOG_ERROR("BUG: error scheduling etm register read");
LOG_DEBUG("%i", etm_reg->addr);
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
fields[0].tap = etm_reg->jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
- fields[0].out_mask = NULL;
fields[0].in_value = NULL;
- fields[0].in_check_value = NULL;
- fields[0].in_check_mask = NULL;
- fields[0].in_handler = NULL;
- fields[0].in_handler_priv = NULL;
fields[1].tap = etm_reg->jtag_info->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
- fields[1].out_mask = NULL;
fields[1].in_value = NULL;
- fields[1].in_check_value = NULL;
- fields[1].in_check_mask = NULL;
- fields[1].in_handler = NULL;
- fields[1].in_handler_priv = NULL;
fields[2].tap = etm_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 0);
- fields[2].out_mask = NULL;
fields[2].in_value = NULL;
- fields[2].in_check_value = NULL;
- fields[2].in_check_mask = NULL;
- fields[2].in_handler = NULL;
- fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
fields[0].in_value = reg->value;
- jtag_set_check_value(fields+0, check_value, check_mask, NULL);
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
+
+ jtag_check_value_mask(fields+0, check_value, check_mask);
free(fields[1].out_value);
free(fields[2].out_value);
int etm_set_reg(reg_t *reg, u32 value)
{
int retval;
+
if ((retval = etm_write_reg(reg, value)) != ERROR_OK)
{
LOG_ERROR("BUG: error scheduling etm register write");
int etm_set_reg_w_exec(reg_t *reg, u8 *buf)
{
int retval;
+
etm_set_reg(reg, buf_get_u32(buf, 0, reg->size));
if ((retval = jtag_execute_queue()) != ERROR_OK)
LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value);
- jtag_add_end_state(TAP_RTI);
+ jtag_add_end_state(TAP_IDLE);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
arm_jtag_set_instr(etm_reg->jtag_info, etm_reg->jtag_info->intest_instr, NULL);
fields[0].num_bits = 32;
fields[0].out_value = malloc(4);
buf_set_u32(fields[0].out_value, 0, 32, value);
- fields[0].out_mask = NULL;
+
fields[0].in_value = NULL;
- fields[0].in_check_value = NULL;
- fields[0].in_check_mask = NULL;
- fields[0].in_handler = NULL;
- fields[0].in_handler_priv = NULL;
fields[1].tap = etm_reg->jtag_info->tap;
fields[1].num_bits = 7;
fields[1].out_value = malloc(1);
buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
- fields[1].out_mask = NULL;
+
fields[1].in_value = NULL;
- fields[1].in_check_value = NULL;
- fields[1].in_check_mask = NULL;
- fields[1].in_handler = NULL;
- fields[1].in_handler_priv = NULL;
fields[2].tap = etm_reg->jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = malloc(1);
buf_set_u32(fields[2].out_value, 0, 1, 1);
- fields[2].out_mask = NULL;
+
fields[2].in_value = NULL;
- fields[2].in_check_value = NULL;
- fields[2].in_check_mask = NULL;
- fields[2].in_handler = NULL;
- fields[2].in_handler_priv = NULL;
- jtag_add_dr_scan(3, fields, -1);
+ jtag_add_dr_scan(3, fields, TAP_INVALID);
free(fields[0].out_value);
free(fields[1].out_value);
/* ETM trace analysis functionality
*
*/
-extern etm_capture_driver_t etb_capture_driver;
extern etm_capture_driver_t etm_dummy_capture_driver;
#if BUILD_OOCD_TRACE == 1
extern etm_capture_driver_t oocd_trace_capture_driver;
#endif
-etm_capture_driver_t *etm_capture_drivers[] =
+static etm_capture_driver_t *etm_capture_drivers[] =
{
&etb_capture_driver,
&etm_dummy_capture_driver,
"reserved",
};
-int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
+static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
{
int i;
int section = -1;
return ERROR_OK;
}
-int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo)
+static int etmv1_next_packet(etm_context_t *ctx, u8 *packet, int apo)
{
while (ctx->data_index < ctx->trace_depth)
{
return -1;
}
-int etmv1_branch_address(etm_context_t *ctx)
+static int etmv1_branch_address(etm_context_t *ctx)
{
int retval;
u8 packet;
int shift = 0;
int apo;
- int i;
+ u32 i;
/* quit analysis if less than two cycles are left in the trace
* because we can't extract the APO */
return 0;
}
-int etmv1_data(etm_context_t *ctx, int size, u32 *data)
+static int etmv1_data(etm_context_t *ctx, int size, u32 *data)
{
int j;
u8 buf[4];
return 0;
}
-int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
+static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
{
int retval;
arm_instruction_t instruction;
continue;
/* indirect branch to the exception vector means an exception occured */
- if (((ctx->last_branch >= 0x0) && (ctx->last_branch <= 0x20))
+ if ((ctx->last_branch <= 0x20)
|| ((ctx->last_branch >= 0xffff0000) && (ctx->last_branch <= 0xffff0020)))
{
if ((ctx->last_branch & 0xff) == 0x10)
if ((pipestat == STAT_IE) || (pipestat == STAT_ID))
{
if (((instruction.type == ARM_B) ||
- (instruction.type == ARM_BL) ||
- (instruction.type == ARM_BLX)) &&
- (instruction.info.b_bl_bx_blx.target_address != -1))
+ (instruction.type == ARM_BL) ||
+ (instruction.type == ARM_BLX)) &&
+ (instruction.info.b_bl_bx_blx.target_address != 0xffffffff))
{
next_pc = instruction.info.b_bl_bx_blx.target_address;
}
return ERROR_OK;
}
-int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_tracemode_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_image_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_dump_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
fileio_t file;
target_t *target;
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
- int i;
+ u32 i;
if (argc != 1)
{
return ERROR_OK;
}
-int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
fileio_t file;
target_t *target;
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
etm_context_t *etm_ctx;
- int i;
+ u32 i;
if (argc != 1)
{
fileio_read_u32(&file, &etm_ctx->trace_depth);
etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth);
- if(etm_ctx->trace_data == NULL)
+ if (etm_ctx->trace_data == NULL)
{
command_print(cmd_ctx, "not enough memory to perform operation");
fileio_close(&file);
return ERROR_OK;
}
-int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_stop_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_stop_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
return ERROR_OK;
}
-int handle_etm_analyze_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etm_analyze_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
target_t *target;
armv4_5_common_t *armv4_5;
if ((retval = etmv1_analyze_trace(etm_ctx, cmd_ctx)) != ERROR_OK)
{
- switch(retval)
+ switch (retval)
{
case ERROR_ETM_ANALYSIS_FAILED:
command_print(cmd_ctx, "further analysis failed (corrupted trace data or just end of data");
projects / fw / openocd / blobdiff