target/armv7m: rework Cortex-M register handling part 1

[fw/openocd] / src / target / etm.c

diff --git a/src/target/etm.c b/src/target/etm.c
index d1cfe61f693e17d7a02599391ab62bdfc770595a..93dbd29488fb5b38169ba35a5e26dd1f128723b0 100644 (file)
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -533,7 +533,7 @@ static int etm_read_reg_w_check(struct reg *reg,
        fields[0].check_mask = NULL;
 
        fields[1].num_bits = 7;
-       uint8_t temp1;
+       uint8_t temp1 = 0;
        fields[1].out_value = &temp1;
        buf_set_u32(&temp1, 0, 7, reg_addr);
        fields[1].in_value = NULL;
@@ -541,7 +541,7 @@ static int etm_read_reg_w_check(struct reg *reg,
        fields[1].check_mask = NULL;
 
        fields[2].num_bits = 1;
-       uint8_t temp2;
+       uint8_t temp2 = 0;
        fields[2].out_value = &temp2;
        buf_set_u32(&temp2, 0, 1, 0);
        fields[2].in_value = NULL;
@@ -620,13 +620,13 @@ static int etm_write_reg(struct reg *reg, uint32_t value)
        fields[0].in_value = NULL;
 
        fields[1].num_bits = 7;
-       uint8_t tmp2;
+       uint8_t tmp2 = 0;
        fields[1].out_value = &tmp2;
        buf_set_u32(&tmp2, 0, 7, reg_addr);
        fields[1].in_value = NULL;
 
        fields[2].num_bits = 1;
-       uint8_t tmp3;
+       uint8_t tmp3 = 0;
        fields[2].out_value = &tmp3;
        buf_set_u32(&tmp3, 0, 1, 1);
        fields[2].in_value = NULL;
@@ -650,7 +650,6 @@ static struct etm_capture_driver *etm_capture_drivers[] = {
 
 static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction *instruction)
 {
-       int i;
        int section = -1;
        size_t size_read;
        uint32_t opcode;
@@ -660,7 +659,7 @@ static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction
                return ERROR_TRACE_IMAGE_UNAVAILABLE;
 
        /* search for the section the current instruction belongs to */
-       for (i = 0; i < ctx->image->num_sections; i++) {
+       for (unsigned int i = 0; i < ctx->image->num_sections; i++) {
                if ((ctx->image->sections[i].base_address <= ctx->current_pc) &&
                        (ctx->image->sections[i].base_address + ctx->image->sections[i].size >
                        ctx->current_pc)) {
@@ -1074,8 +1073,8 @@ static int etmv1_analyze_trace(struct etm_context *ctx, struct command_invocatio
                                        (instruction.type == ARM_STM)) {
                                        int i;
                                        for (i = 0; i < 16; i++) {
-                                               if (instruction.info.load_store_multiple.
-                                                       register_list & (1 << i)) {
+                                               if (instruction.info.load_store_multiple.register_list
+                                                       & (1 << i)) {
                                                        uint32_t data;
                                                        if (etmv1_data(ctx, 4, &data) != 0)
                                                                return ERROR_ETM_ANALYSIS_FAILED;
@@ -1683,15 +1682,15 @@ COMMAND_HANDLER(handle_etm_image_command)
        }
 
        etm_ctx->image = malloc(sizeof(struct image));
-       etm_ctx->image->base_address_set = 0;
-       etm_ctx->image->start_address_set = 0;
+       etm_ctx->image->base_address_set = false;
+       etm_ctx->image->start_address_set = false;
 
        /* a base address isn't always necessary, default to 0x0 (i.e. don't relocate) */
        if (CMD_ARGC >= 2) {
-               etm_ctx->image->base_address_set = 1;
+               etm_ctx->image->base_address_set = true;
                COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], etm_ctx->image->base_address);
        } else
-               etm_ctx->image->base_address_set = 0;
+               etm_ctx->image->base_address_set = false;
 
        if (image_open(etm_ctx->image, CMD_ARGV[0],
                (CMD_ARGC >= 3) ? CMD_ARGV[2] : NULL) != ERROR_OK) {