#include "config.h"
#endif
-#include "etm.h"
+#include "armv4_5.h"
#include "etb.h"
#include "image.h"
-#include "arm7_9_common.h"
#include "arm_disassembler.h"
* provide definitions for some previously-unused bits.
*/
-/* basic registers that are always there given the right ETM version */
+/* core registers used to version/configure the ETM */
static const struct etm_reg_info etm_core[] = {
- /* NOTE: we "know" ETM_CONFIG is listed first */
+ /* NOTE: we "know" the order here ... */
{ ETM_CONFIG, 32, RO, 0x10, "ETM_config", },
+ { ETM_ID, 32, RO, 0x20, "ETM_id", },
+};
+/* basic registers that are always there given the right ETM version */
+static const struct etm_reg_info etm_basic[] = {
/* ETM Trace Registers */
{ ETM_CTRL, 32, RW, 0x10, "ETM_ctrl", },
{ ETM_TRIG_EVENT, 17, WO, 0x10, "ETM_trig_event", },
/* REVISIT exclude VIEWDATA_CTRL2 when it's not there */
{ 0x78, 12, WO, 0x20, "ETM_sync_freq", },
- { 0x79, 32, RO, 0x20, "ETM_id", },
+ { 0x7a, 22, RO, 0x31, "ETM_config_code_ext", },
+ { 0x7b, 32, WO, 0x31, "ETM_ext_input_select", },
+ { 0x7c, 32, WO, 0x34, "ETM_trace_start_stop", },
+ { 0x7d, 8, WO, 0x34, "ETM_behavior_control", },
};
static const struct etm_reg_info etm_fifofull[] = {
static int etm_reg_arch_type = -1;
-static int etm_get_reg(reg_t *reg);
-static int etm_read_reg_w_check(reg_t *reg,
+static int etm_get_reg(struct reg *reg);
+static int etm_read_reg_w_check(struct reg *reg,
uint8_t* check_value, uint8_t* check_mask);
static int etm_register_user_commands(struct command_context_s *cmd_ctx);
-static int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf);
-static int etm_write_reg(reg_t *reg, uint32_t value);
+static int etm_set_reg_w_exec(struct reg *reg, uint8_t *buf);
+static int etm_write_reg(struct reg *reg, uint32_t value);
static command_t *etm_cmd;
/* Look up register by ID ... most ETM instances only
* support a subset of the possible registers.
*/
-static reg_t *etm_reg_lookup(etm_context_t *etm_ctx, unsigned id)
+static struct reg *etm_reg_lookup(struct etm_context *etm_ctx, unsigned id)
{
- reg_cache_t *cache = etm_ctx->reg_cache;
+ struct reg_cache *cache = etm_ctx->reg_cache;
int i;
for (i = 0; i < cache->num_regs; i++) {
- struct etm_reg_s *reg = cache->reg_list[i].arch_info;
+ struct etm_reg *reg = cache->reg_list[i].arch_info;
if (reg->reg_info->addr == id)
return &cache->reg_list[i];
return NULL;
}
-static void etm_reg_add(unsigned bcd_vers, arm_jtag_t *jtag_info,
- reg_cache_t *cache, etm_reg_t *ereg,
+static void etm_reg_add(unsigned bcd_vers, struct arm_jtag *jtag_info,
+ struct reg_cache *cache, struct etm_reg *ereg,
const struct etm_reg_info *r, unsigned nreg)
{
- reg_t *reg = cache->reg_list;
+ struct reg *reg = cache->reg_list;
reg += cache->num_regs;
ereg += cache->num_regs;
}
}
-reg_cache_t *etm_build_reg_cache(target_t *target,
- arm_jtag_t *jtag_info, etm_context_t *etm_ctx)
+struct reg_cache *etm_build_reg_cache(target_t *target,
+ struct arm_jtag *jtag_info, struct etm_context *etm_ctx)
{
- reg_cache_t *reg_cache = malloc(sizeof(reg_cache_t));
- reg_t *reg_list = NULL;
- etm_reg_t *arch_info = NULL;
+ struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
+ struct reg *reg_list = NULL;
+ struct etm_reg *arch_info = NULL;
unsigned bcd_vers, config;
/* register a register arch-type for etm registers only once */
etm_set_reg_w_exec);
/* the actual registers are kept in two arrays */
- reg_list = calloc(128, sizeof(reg_t));
- arch_info = calloc(128, sizeof(etm_reg_t));
+ reg_list = calloc(128, sizeof(struct reg));
+ arch_info = calloc(128, sizeof(struct etm_reg));
/* fill in values for the reg cache */
reg_cache->name = "etm registers";
bcd_vers = 0x20;
LOG_WARNING("ETMv2+ support is incomplete");
- /* REVISIT read ID register, distinguish ETMv3.3 etc;
+ /* REVISIT more registers may exist; they may now be
+ * readable; more register bits have defined meanings;
* don't presume trace start/stop support is present;
* and include any context ID comparator registers.
*/
+ etm_reg_add(0x20, jtag_info, reg_cache, arch_info,
+ etm_core + 1, 1);
+ etm_get_reg(reg_list + 1);
+ etm_ctx->id = buf_get_u32(
+ (void *)&arch_info[1].value, 0, 32);
+ LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id);
+ bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff);
+
} else {
switch (config >> 28) {
case 7:
LOG_INFO("ETM v%d.%d", bcd_vers >> 4, bcd_vers & 0xf);
etm_reg_add(bcd_vers, jtag_info, reg_cache, arch_info,
- etm_core + 1, ARRAY_SIZE(etm_core) - 1);
+ etm_basic, ARRAY_SIZE(etm_basic));
/* address and data comparators; counters; outputs */
etm_reg_add(bcd_vers, jtag_info, reg_cache, arch_info,
/* the ETM might have an ETB connected */
if (strcmp(etm_ctx->capture_driver->name, "etb") == 0)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
+ struct etb *etb = etm_ctx->capture_driver_priv;
if (!etb)
{
etb->reg_cache = reg_cache->next;
}
-
+ etm_ctx->reg_cache = reg_cache;
return reg_cache;
}
-static int etm_read_reg(reg_t *reg)
+static int etm_read_reg(struct reg *reg)
{
return etm_read_reg_w_check(reg, NULL, NULL);
}
-static int etm_store_reg(reg_t *reg)
+static int etm_store_reg(struct reg *reg)
{
return etm_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
}
{
int retval;
uint32_t etm_ctrl_value;
- struct arm7_9_common_s *arm7_9 = target_to_arm7_9(target);
- etm_context_t *etm_ctx = arm7_9->etm_ctx;
- reg_t *etm_ctrl_reg;
+ struct arm *arm = target_to_arm(target);
+ struct etm_context *etm_ctx = arm->etm;
+ struct reg *etm_ctrl_reg;
etm_ctrl_reg = etm_reg_lookup(etm_ctx, ETM_CTRL);
if (!etm_ctrl_reg)
/* clear the ETM powerdown bit (0) */
etm_ctrl_value &= ~0x1;
- /* configure port width (6:4), mode (17:16) and clocking (13) */
- etm_ctrl_value = (etm_ctrl_value &
- ~ETM_PORT_WIDTH_MASK & ~ETM_PORT_MODE_MASK & ~ETM_PORT_CLOCK_MASK)
+ /* configure port width (21,6:4), mode (13,17:16) and
+ * for older modules clocking (13)
+ */
+ etm_ctrl_value = (etm_ctrl_value
+ & ~ETM_PORT_WIDTH_MASK
+ & ~ETM_PORT_MODE_MASK
+ & ~ETM_PORT_CLOCK_MASK)
| etm_ctx->portmode;
buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value);
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
+ /* REVISIT for ETMv3.0 and later, read ETM_sys_config to
+ * verify that those width and mode settings are OK ...
+ */
+
if ((retval = etm_ctx->capture_driver->init(etm_ctx)) != ERROR_OK)
{
LOG_ERROR("ETM capture driver initialization failed");
return ERROR_OK;
}
-static int etm_get_reg(reg_t *reg)
+static int etm_get_reg(struct reg *reg)
{
int retval;
return ERROR_OK;
}
-static int etm_read_reg_w_check(reg_t *reg,
+static int etm_read_reg_w_check(struct reg *reg,
uint8_t* check_value, uint8_t* check_mask)
{
- etm_reg_t *etm_reg = reg->arch_info;
+ struct etm_reg *etm_reg = reg->arch_info;
const struct etm_reg_info *r = etm_reg->reg_info;
uint8_t reg_addr = r->addr & 0x7f;
- scan_field_t fields[3];
+ struct scan_field fields[3];
if (etm_reg->reg_info->mode == WO) {
LOG_ERROR("BUG: can't read write-only register %s", r->name);
return ERROR_OK;
}
-static int etm_set_reg(reg_t *reg, uint32_t value)
+static int etm_set_reg(struct reg *reg, uint32_t value)
{
int retval;
return ERROR_OK;
}
-static int etm_set_reg_w_exec(reg_t *reg, uint8_t *buf)
+static int etm_set_reg_w_exec(struct reg *reg, uint8_t *buf)
{
int retval;
return ERROR_OK;
}
-static int etm_write_reg(reg_t *reg, uint32_t value)
+static int etm_write_reg(struct reg *reg, uint32_t value)
{
- etm_reg_t *etm_reg = reg->arch_info;
+ struct etm_reg *etm_reg = reg->arch_info;
const struct etm_reg_info *r = etm_reg->reg_info;
uint8_t reg_addr = r->addr & 0x7f;
- scan_field_t fields[3];
+ struct scan_field fields[3];
if (etm_reg->reg_info->mode == RO) {
LOG_ERROR("BUG: can't write read--only register %s", r->name);
/* ETM trace analysis functionality
*
*/
-extern etm_capture_driver_t etm_dummy_capture_driver;
+extern struct etm_capture_driver etm_dummy_capture_driver;
#if BUILD_OOCD_TRACE == 1
-extern etm_capture_driver_t oocd_trace_capture_driver;
+extern struct etm_capture_driver oocd_trace_capture_driver;
#endif
-static etm_capture_driver_t *etm_capture_drivers[] =
+static struct etm_capture_driver *etm_capture_drivers[] =
{
&etb_capture_driver,
&etm_dummy_capture_driver,
NULL
};
-static int etm_read_instruction(etm_context_t *ctx, arm_instruction_t *instruction)
+static int etm_read_instruction(struct etm_context *ctx, struct arm_instruction *instruction)
{
int i;
int section = -1;
return ERROR_OK;
}
-static int etmv1_next_packet(etm_context_t *ctx, uint8_t *packet, int apo)
+static int etmv1_next_packet(struct etm_context *ctx, uint8_t *packet, int apo)
{
while (ctx->data_index < ctx->trace_depth)
{
return -1;
}
-static int etmv1_branch_address(etm_context_t *ctx)
+static int etmv1_branch_address(struct etm_context *ctx)
{
int retval;
uint8_t packet;
return 0;
}
-static int etmv1_data(etm_context_t *ctx, int size, uint32_t *data)
+static int etmv1_data(struct etm_context *ctx, int size, uint32_t *data)
{
int j;
uint8_t buf[4];
return 0;
}
-static int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
+static int etmv1_analyze_trace(struct etm_context *ctx, struct command_context_s *cmd_ctx)
{
int retval;
- arm_instruction_t instruction;
+ struct arm_instruction instruction;
/* read the trace data if it wasn't read already */
if (ctx->trace_depth == 0)
return ERROR_OK;
}
-static int handle_etm_tracemode_command_update(
- struct command_context_s *cmd_ctx,
- char **args, etmv1_tracemode_t *mode)
+static COMMAND_HELPER(handle_etm_tracemode_command_update,
+ etmv1_tracemode_t *mode)
{
etmv1_tracemode_t tracemode;
return ERROR_OK;
}
-static int handle_etm_tracemode_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_tracemode_command)
{
target_t *target = get_current_target(cmd_ctx);
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- struct etm *etm;
+ struct arm *arm = target_to_arm(target);
+ struct etm_context *etm;
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
- {
+ if (!is_arm(arm)) {
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- etm = arm7_9->etm_ctx;
+ etm = arm->etm;
if (!etm) {
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
case 0:
break;
case 4:
- handle_etm_tracemode_command_update(cmd_ctx, args, &tracemode);
+ CALL_COMMAND_HANDLER(handle_etm_tracemode_command_update, &tracemode);
break;
default:
command_print(cmd_ctx, "usage: configure trace mode "
/* only update ETM_CTRL register if tracemode changed */
if (etm->tracemode != tracemode)
{
- reg_t *etm_ctrl_reg;
+ struct reg *etm_ctrl_reg;
etm_ctrl_reg = etm_reg_lookup(etm, ETM_CTRL);
if (!etm_ctrl_reg)
return ERROR_OK;
}
-static int handle_etm_config_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_config_command)
{
target_t *target;
struct arm *arm;
- arm7_9_common_t *arm7_9;
etm_portmode_t portmode = 0x0;
- struct etm *etm_ctx;
+ struct etm_context *etm_ctx;
int i;
if (argc != 5)
return ERROR_FAIL;
}
- if (arm7_9_get_arch_pointers(target, &arm, &arm7_9) != ERROR_OK)
- {
+ arm = target_to_arm(target);
+ if (!is_arm(arm)) {
command_print(cmd_ctx, "target '%s' is '%s'; not an ARM",
target->cmd_name, target_get_name(target));
return ERROR_FAIL;
}
+ /* FIXME for ETMv3.0 and above -- and we don't yet know what ETM
+ * version we'll be using!! -- so we can't know how to validate
+ * params yet. "etm config" should likely be *AFTER* hookup...
+ *
+ * - Many more widths might be supported ... and we can easily
+ * check whether our setting "took".
+ *
+ * - The "clock" and "mode" bits are interpreted differently.
+ * See ARM IHI 0014O table 2-17 for the old behavior, and
+ * table 2-18 for the new. With ETB it's best to specify
+ * "normal full" ...
+ */
uint8_t port_width;
COMMAND_PARSE_NUMBER(u8, args[1], port_width);
switch (port_width)
{
+ /* before ETMv3.0 */
case 4:
portmode |= ETM_PORT_4BIT;
break;
case 16:
portmode |= ETM_PORT_16BIT;
break;
+ /* ETMv3.0 and later*/
+ case 24:
+ portmode |= ETM_PORT_24BIT;
+ break;
+ case 32:
+ portmode |= ETM_PORT_32BIT;
+ break;
+ case 48:
+ portmode |= ETM_PORT_48BIT;
+ break;
+ case 64:
+ portmode |= ETM_PORT_64BIT;
+ break;
+ case 1:
+ portmode |= ETM_PORT_1BIT;
+ break;
+ case 2:
+ portmode |= ETM_PORT_2BIT;
+ break;
default:
- command_print(cmd_ctx, "unsupported ETM port width '%s', must be 4, 8 or 16", args[1]);
+ command_print(cmd_ctx,
+ "unsupported ETM port width '%s'", args[1]);
return ERROR_FAIL;
}
return ERROR_FAIL;
}
- etm_ctx = calloc(1, sizeof(etm_context_t));
+ etm_ctx = calloc(1, sizeof(struct etm_context));
if (!etm_ctx) {
LOG_DEBUG("out of memory");
return ERROR_FAIL;
etm_ctx->portmode = portmode;
etm_ctx->core_state = ARMV4_5_STATE_ARM;
- arm7_9->etm_ctx = etm_ctx;
arm->etm = etm_ctx;
return etm_register_user_commands(cmd_ctx);
}
-static int handle_etm_info_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_info_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm;
- reg_t *etm_sys_config_reg;
-
+ struct arm *arm;
+ struct etm_context *etm;
+ struct reg *etm_sys_config_reg;
int max_port_size;
+ uint32_t config;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- etm = arm7_9->etm_ctx;
+ etm = arm->etm;
if (!etm)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
command_print(cmd_ctx, "protocol version: %i",
(int) (etm->config >> 28) & 0x07);
else {
+ command_print(cmd_ctx,
+ "coprocessor and memory access %ssupported",
+ (etm->config & (1 << 26)) ? "" : "not ");
command_print(cmd_ctx, "trace start/stop %spresent",
(etm->config & (1 << 26)) ? "" : "not ");
command_print(cmd_ctx, "number of context comparators: %i",
return ERROR_OK;
etm_get_reg(etm_sys_config_reg);
+ config = buf_get_u32(etm_sys_config_reg->value, 0, 32);
+
+ LOG_DEBUG("ETM SYS CONFIG %08x", (unsigned) config);
- switch (buf_get_u32(etm_sys_config_reg->value, 0, 3))
+ max_port_size = config & 0x7;
+ if (etm->bcd_vers >= 0x30)
+ max_port_size |= (config >> 6) & 0x08;
+ switch (max_port_size)
{
+ /* before ETMv3.0 */
case 0:
max_port_size = 4;
break;
case 2:
max_port_size = 16;
break;
+ /* ETMv3.0 and later*/
+ case 3:
+ max_port_size = 24;
+ break;
+ case 4:
+ max_port_size = 32;
+ break;
+ case 5:
+ max_port_size = 48;
+ break;
+ case 6:
+ max_port_size = 64;
+ break;
+ case 8:
+ max_port_size = 1;
+ break;
+ case 9:
+ max_port_size = 2;
+ break;
default:
LOG_ERROR("Illegal max_port_size");
return ERROR_FAIL;
}
command_print(cmd_ctx, "max. port size: %i", max_port_size);
- command_print(cmd_ctx, "half-rate clocking %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 3, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "full-rate clocking %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 4, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "normal trace format %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 5, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "multiplex trace format %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 6, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "demultiplex trace format %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 7, 1) == 1) ? "" : "not ");
+ if (etm->bcd_vers < 0x30) {
+ command_print(cmd_ctx, "half-rate clocking %ssupported",
+ (config & (1 << 3)) ? "" : "not ");
+ command_print(cmd_ctx, "full-rate clocking %ssupported",
+ (config & (1 << 4)) ? "" : "not ");
+ command_print(cmd_ctx, "normal trace format %ssupported",
+ (config & (1 << 5)) ? "" : "not ");
+ command_print(cmd_ctx, "multiplex trace format %ssupported",
+ (config & (1 << 6)) ? "" : "not ");
+ command_print(cmd_ctx, "demultiplex trace format %ssupported",
+ (config & (1 << 7)) ? "" : "not ");
+ } else {
+ /* REVISIT show which size and format are selected ... */
+ command_print(cmd_ctx, "current port size %ssupported",
+ (config & (1 << 10)) ? "" : "not ");
+ command_print(cmd_ctx, "current trace format %ssupported",
+ (config & (1 << 11)) ? "" : "not ");
+ }
+ if (etm->bcd_vers >= 0x21)
+ command_print(cmd_ctx, "fetch comparisons %ssupported",
+ (config & (1 << 17)) ? "not " : "");
command_print(cmd_ctx, "FIFO full %ssupported",
- (buf_get_u32(etm_sys_config_reg->value, 8, 1) == 1) ? "" : "not ");
+ (config & (1 << 8)) ? "" : "not ");
return ERROR_OK;
}
-static int handle_etm_status_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_status_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm;
+ struct arm *arm;
+ struct etm_context *etm;
trace_status_t trace_status;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!arm7_9->etm_ctx)
+ etm = arm->etm;
+ if (!etm)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
}
- etm = arm7_9->etm_ctx;
/* ETM status */
if (etm->bcd_vers >= 0x11) {
- reg_t *reg;
+ struct reg *reg;
reg = etm_reg_lookup(etm, ETM_STATUS);
if (!reg)
return ERROR_OK;
}
-static int handle_etm_image_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_image_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
if (argc < 1)
{
}
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
command_print(cmd_ctx, "previously loaded image found and closed");
}
- etm_ctx->image = malloc(sizeof(image_t));
+ etm_ctx->image = malloc(sizeof(struct image));
etm_ctx->image->base_address_set = 0;
etm_ctx->image->start_address_set = 0;
return ERROR_OK;
}
-static int handle_etm_dump_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_dump_command)
{
- fileio_t file;
+ struct fileio file;
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
uint32_t i;
if (argc != 1)
}
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
return ERROR_OK;
}
-static int handle_etm_load_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_load_command)
{
- fileio_t file;
+ struct fileio file;
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
uint32_t i;
if (argc != 1)
}
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
fileio_read_u32(&file, &tmp); etm_ctx->tracemode = tmp;
fileio_read_u32(&file, &etm_ctx->trace_depth);
}
- etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth);
+ etm_ctx->trace_data = malloc(sizeof(struct etmv1_trace_data) * etm_ctx->trace_depth);
if (etm_ctx->trace_data == NULL)
{
command_print(cmd_ctx, "not enough memory to perform operation");
return ERROR_OK;
}
-static int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_trigger_percent_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
return ERROR_OK;
}
-static int handle_etm_start_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_start_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
- reg_t *etm_ctrl_reg;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
+ struct reg *etm_ctrl_reg;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- etm_ctx = arm7_9->etm_ctx;
+ etm_ctx = arm->etm;
if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_OK;
}
-static int handle_etm_stop_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_stop_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
- reg_t *etm_ctrl_reg;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
+ struct reg *etm_ctrl_reg;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
return ERROR_OK;
}
-static int handle_etm_analyze_command(struct command_context_s *cmd_ctx,
- char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etm_analyze_command)
{
target_t *target;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
- etm_context_t *etm_ctx;
+ struct arm *arm;
+ struct etm_context *etm_ctx;
int retval;
target = get_current_target(cmd_ctx);
-
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
command_print(cmd_ctx, "ETM: current target isn't an ARM");
return ERROR_FAIL;
}
- if (!(etm_ctx = arm7_9->etm_ctx))
+ etm_ctx = arm->etm;
+ if (!etm_ctx)
{
command_print(cmd_ctx, "current target doesn't have an ETM configured");
return ERROR_FAIL;
projects / fw / openocd / blobdiff