#endif
#include "armv4_5.h"
+#include "etm.h"
#include "etb.h"
+#include "register.h"
static char* etb_reg_list[] =
"ETB_control",
};
-static int etb_reg_arch_type = -1;
+static int etb_get_reg(struct reg *reg);
-static int etb_get_reg(reg_t *reg);
-
-static int etb_set_instr(etb_t *etb, uint32_t new_instr)
+static int etb_set_instr(struct etb *etb, uint32_t new_instr)
{
struct jtag_tap *tap;
field.tap = tap;
field.num_bits = tap->ir_length;
- field.out_value = calloc(CEIL(field.num_bits, 8), 1);
+ field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.in_value = NULL;
return ERROR_OK;
}
-static int etb_scann(etb_t *etb, uint32_t new_scan_chain)
+static int etb_scann(struct etb *etb, uint32_t new_scan_chain)
{
if (etb->cur_scan_chain != new_scan_chain)
{
field.tap = etb->tap;
field.num_bits = 5;
- field.out_value = calloc(CEIL(field.num_bits, 8), 1);
+ field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
field.in_value = NULL;
return ERROR_OK;
}
-static int etb_read_reg_w_check(reg_t *, uint8_t *, uint8_t *);
-static int etb_set_reg_w_exec(reg_t *, uint8_t *);
+static int etb_read_reg_w_check(struct reg *, uint8_t *, uint8_t *);
+static int etb_set_reg_w_exec(struct reg *, uint8_t *);
-static int etb_read_reg(reg_t *reg)
+static int etb_read_reg(struct reg *reg)
{
return etb_read_reg_w_check(reg, NULL, NULL);
}
-static int etb_get_reg(reg_t *reg)
+static int etb_get_reg(struct reg *reg)
{
int retval;
return ERROR_OK;
}
-struct reg_cache* etb_build_reg_cache(etb_t *etb)
+static const struct reg_arch_type etb_reg_type = {
+ .get = etb_get_reg,
+ .set = etb_set_reg_w_exec,
+};
+
+struct reg_cache* etb_build_reg_cache(struct etb *etb)
{
struct reg_cache *reg_cache = malloc(sizeof(struct reg_cache));
- reg_t *reg_list = NULL;
+ struct reg *reg_list = NULL;
struct etb_reg *arch_info = NULL;
int num_regs = 9;
int i;
- /* register a register arch-type for etm registers only once */
- if (etb_reg_arch_type == -1)
- etb_reg_arch_type = register_reg_arch_type(etb_get_reg, etb_set_reg_w_exec);
-
/* the actual registers are kept in two arrays */
- reg_list = calloc(num_regs, sizeof(reg_t));
+ reg_list = calloc(num_regs, sizeof(struct reg));
arch_info = calloc(num_regs, sizeof(struct etb_reg));
/* fill in values for the reg cache */
reg_list[i].size = 32;
reg_list[i].dirty = 0;
reg_list[i].valid = 0;
- reg_list[i].bitfield_desc = NULL;
- reg_list[i].num_bitfields = 0;
reg_list[i].value = calloc(1, 4);
reg_list[i].arch_info = &arch_info[i];
- reg_list[i].arch_type = etb_reg_arch_type;
+ reg_list[i].type = &etb_reg_type;
reg_list[i].size = 32;
arch_info[i].addr = i;
arch_info[i].etb = etb;
}
-static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames)
+static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
{
struct scan_field fields[3];
int i;
return ERROR_OK;
}
-static int etb_read_reg_w_check(reg_t *reg,
+static int etb_read_reg_w_check(struct reg *reg,
uint8_t* check_value, uint8_t* check_mask)
{
struct etb_reg *etb_reg = reg->arch_info;
return ERROR_OK;
}
-static int etb_write_reg(reg_t *, uint32_t);
+static int etb_write_reg(struct reg *, uint32_t);
-static int etb_set_reg(reg_t *reg, uint32_t value)
+static int etb_set_reg(struct reg *reg, uint32_t value)
{
int retval;
return ERROR_OK;
}
-static int etb_set_reg_w_exec(reg_t *reg, uint8_t *buf)
+static int etb_set_reg_w_exec(struct reg *reg, uint8_t *buf)
{
int retval;
return ERROR_OK;
}
-static int etb_write_reg(reg_t *reg, uint32_t value)
+static int etb_write_reg(struct reg *reg, uint32_t value)
{
struct etb_reg *etb_reg = reg->arch_info;
uint8_t reg_addr = etb_reg->addr & 0x7f;
COMMAND_HANDLER(handle_etb_config_command)
{
- target_t *target;
+ struct target *target;
struct jtag_tap *tap;
struct arm *arm;
- if (argc != 2)
+ if (CMD_ARGC != 2)
{
return ERROR_COMMAND_SYNTAX_ERROR;
}
- target = get_target(args[0]);
+ target = get_target(CMD_ARGV[0]);
if (!target)
{
- LOG_ERROR("ETB: target '%s' not defined", args[0]);
+ LOG_ERROR("ETB: target '%s' not defined", CMD_ARGV[0]);
return ERROR_FAIL;
}
arm = target_to_arm(target);
if (!is_arm(arm))
{
- command_print(cmd_ctx, "ETB: '%s' isn't an ARM", args[0]);
+ command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
return ERROR_FAIL;
}
- tap = jtag_tap_by_string(args[1]);
+ tap = jtag_tap_by_string(CMD_ARGV[1]);
if (tap == NULL)
{
- command_print(cmd_ctx, "ETB: TAP %s does not exist", args[1]);
+ command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]);
return ERROR_FAIL;
}
if (arm->etm)
{
- etb_t *etb = malloc(sizeof(etb_t));
+ struct etb *etb = malloc(sizeof(struct etb));
arm->etm->capture_driver_priv = etb;
return ERROR_OK;
}
-static int etb_register_commands(struct command_context_s *cmd_ctx)
+static int etb_register_commands(struct command_context *cmd_ctx)
{
- command_t *etb_cmd = register_command(cmd_ctx, NULL, "etb",
+ struct command *etb_cmd = register_command(cmd_ctx, NULL, "etb",
NULL, COMMAND_ANY, "Embedded Trace Buffer");
register_command(cmd_ctx, etb_cmd, "config",
return ERROR_OK;
}
-static int etb_init(etm_context_t *etm_ctx)
+static int etb_init(struct etm_context *etm_ctx)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
+ struct etb *etb = etm_ctx->capture_driver_priv;
etb->etm_ctx = etm_ctx;
return ERROR_OK;
}
-static trace_status_t etb_status(etm_context_t *etm_ctx)
+static trace_status_t etb_status(struct etm_context *etm_ctx)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
- reg_t *control = &etb->reg_cache->reg_list[ETB_CTRL];
- reg_t *status = &etb->reg_cache->reg_list[ETB_STATUS];
+ struct etb *etb = etm_ctx->capture_driver_priv;
+ struct reg *control = &etb->reg_cache->reg_list[ETB_CTRL];
+ struct reg *status = &etb->reg_cache->reg_list[ETB_STATUS];
trace_status_t retval = 0;
int etb_timeout = 100;
return retval;
}
-static int etb_read_trace(etm_context_t *etm_ctx)
+static int etb_read_trace(struct etm_context *etm_ctx)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
+ struct etb *etb = etm_ctx->capture_driver_priv;
int first_frame = 0;
int num_frames = etb->ram_depth;
uint32_t *trace_data = NULL;
return ERROR_OK;
}
-static int etb_start_capture(etm_context_t *etm_ctx)
+static int etb_start_capture(struct etm_context *etm_ctx)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
+ struct etb *etb = etm_ctx->capture_driver_priv;
uint32_t etb_ctrl_value = 0x1;
uint32_t trigger_count;
return ERROR_OK;
}
-static int etb_stop_capture(etm_context_t *etm_ctx)
+static int etb_stop_capture(struct etm_context *etm_ctx)
{
- etb_t *etb = etm_ctx->capture_driver_priv;
- reg_t *etb_ctrl_reg = &etb->reg_cache->reg_list[ETB_CTRL];
+ struct etb *etb = etm_ctx->capture_driver_priv;
+ struct reg *etb_ctrl_reg = &etb->reg_cache->reg_list[ETB_CTRL];
etb_write_reg(etb_ctrl_reg, 0x0);
jtag_execute_queue();
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