stm32.cfg can expect one of 4 id's.

[fw/openocd] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index c536773df7360306bc44564c1391e4dcedfb4670..709bb008057ac8d686df6ec95533384184f244a0 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -82,7 +82,7 @@ int etb_set_instr(etb_t *etb, u32 new_instr)
                field.in_handler = NULL;
                field.in_handler_priv = NULL;
 
-               jtag_add_ir_scan(1, &field, -1);
+               jtag_add_ir_scan(1, &field, TAP_INVALID);
 
                free(field.out_value);
        }
@@ -109,7 +109,7 @@ int etb_scann(etb_t *etb, u32 new_scan_chain)
 
                /* select INTEST instruction */
                etb_set_instr(etb, 0x2);
-               jtag_add_dr_scan(1, &field, -1);
+               jtag_add_dr_scan(1, &field, TAP_INVALID);
 
                etb->cur_scan_chain = new_scan_chain;
 
@@ -184,7 +184,7 @@ int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
        scan_field_t fields[3];
        int i;
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        etb_scann(etb, 0x0);
        etb_set_instr(etb, 0xc);
 
@@ -220,7 +220,7 @@ int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        fields[0].in_handler = buf_to_u32_handler;
 
@@ -236,7 +236,7 @@ int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
                        buf_set_u32(fields[1].out_value, 0, 7, 0);
 
                fields[0].in_handler_priv = &data[i];
-               jtag_add_dr_scan(3, fields, -1);
+               jtag_add_dr_scan(3, fields, TAP_INVALID);
        }
 
        jtag_execute_queue();
@@ -255,7 +255,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 
        LOG_DEBUG("%i", etb_reg->addr);
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        etb_scann(etb_reg->etb, 0x0);
        etb_set_instr(etb_reg->etb, 0xc);
 
@@ -291,7 +291,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        /* read the identification register in the second run, to make sure we
         * don't read the ETB data register twice, skipping every second entry
@@ -301,7 +301,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 
        jtag_set_check_value(fields+0, check_value, check_mask, NULL);
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        free(fields[1].out_value);
        free(fields[2].out_value);
@@ -351,7 +351,7 @@ int etb_write_reg(reg_t *reg, u32 value)
 
        LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value);
 
-       jtag_add_end_state(TAP_RTI);
+       jtag_add_end_state(TAP_IDLE);
        etb_scann(etb_reg->etb, 0x0);
        etb_set_instr(etb_reg->etb, 0xc);
 
@@ -388,7 +388,7 @@ int etb_write_reg(reg_t *reg, u32 value)
        fields[2].in_handler = NULL;
        fields[2].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        free(fields[0].out_value);
        free(fields[1].out_value);
@@ -453,7 +453,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
                arm7_9->etm_ctx->capture_driver_priv = etb;
 
                etb->tap  = tap;
-               etb->cur_scan_chain = -1;
+               etb->cur_scan_chain = ~0UL;
                etb->reg_cache = NULL;
                etb->ram_width = 0;
                etb->ram_depth = 0;