Audit and eliminate redundant #include directives in other target files.

[fw/openocd] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index 9fa1f03c3d547f3e830cc534ad174e7f1067e9a3..6ad283c65b6b12f16c8448d5913dab5aed0a847e 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -21,22 +21,11 @@
 #include "config.h"
 #endif
 
-#include <string.h>
-
 #include "arm7_9_common.h"
 #include "etb.h"
-#include "etm.h"
-
-#include "log.h"
-#include "types.h"
-#include "binarybuffer.h"
-#include "target.h"
-#include "register.h"
-#include "jtag.h"
 
-#include <stdlib.h>
 
-char* etb_reg_list[] =
+static char* etb_reg_list[] =
 {
        "ETB_identification",
        "ETB_ram_depth",
@@ -49,20 +38,16 @@ char* etb_reg_list[] =
        "ETB_control",
 };
 
-int etb_reg_arch_type = -1;
-
-int etb_get_reg(reg_t *reg);
-int etb_set_reg(reg_t *reg, u32 value);
-int etb_set_reg_w_exec(reg_t *reg, u8 *buf);
+static int etb_reg_arch_type = -1;
 
-int etb_write_reg(reg_t *reg, u32 value);
-int etb_read_reg(reg_t *reg);
+static int etb_get_reg(reg_t *reg);
 
-int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
-int etb_set_instr(etb_t *etb, u32 new_instr)
+static int etb_set_instr(etb_t *etb, u32 new_instr)
 {
        jtag_tap_t *tap;
+
        tap = etb->tap;
        if (tap==NULL)
                return ERROR_FAIL;
@@ -75,12 +60,8 @@ int etb_set_instr(etb_t *etb, u32 new_instr)
                field.num_bits = tap->ir_length;
                field.out_value = calloc(CEIL(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
-               field.out_mask = NULL;
+
                field.in_value = NULL;
-               field.in_check_value = NULL;
-               field.in_check_mask = NULL;
-               field.in_handler = NULL;
-               field.in_handler_priv = NULL;
 
                jtag_add_ir_scan(1, &field, TAP_INVALID);
 
@@ -90,9 +71,9 @@ int etb_set_instr(etb_t *etb, u32 new_instr)
        return ERROR_OK;
 }
 
-int etb_scann(etb_t *etb, u32 new_scan_chain)
+static int etb_scann(etb_t *etb, u32 new_scan_chain)
 {
-       if(etb->cur_scan_chain != new_scan_chain)
+       if (etb->cur_scan_chain != new_scan_chain)
        {
                scan_field_t field;
 
@@ -100,12 +81,8 @@ int etb_scann(etb_t *etb, u32 new_scan_chain)
                field.num_bits = 5;
                field.out_value = calloc(CEIL(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
-               field.out_mask = NULL;
+
                field.in_value = NULL;
-               field.in_check_value = NULL;
-               field.in_check_mask = NULL;
-               field.in_handler = NULL;
-               field.in_handler_priv = NULL;
 
                /* select INTEST instruction */
                etb_set_instr(etb, 0x2);
@@ -161,9 +138,10 @@ reg_cache_t* etb_build_reg_cache(etb_t *etb)
        return reg_cache;
 }
 
-int etb_get_reg(reg_t *reg)
+static int etb_get_reg(reg_t *reg)
 {
        int retval;
+
        if ((retval = etb_read_reg(reg)) != ERROR_OK)
        {
                LOG_ERROR("BUG: error scheduling etm register read");
@@ -179,7 +157,7 @@ int etb_get_reg(reg_t *reg)
        return ERROR_OK;
 }
 
-int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
+static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
 {
        scan_field_t fields[3];
        int i;
@@ -191,39 +169,23 @@ int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
        fields[0].tap = etb->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+       u8 tmp[4];
+       fields[0].in_value = tmp;
 
        fields[1].tap = etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, 4);
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
        fields[2].tap = etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
-       fields[0].in_handler = buf_to_u32_handler;
-
        for (i = 0; i < num_frames; i++)
        {
                /* ensure nR/W reamins set to read */
@@ -235,8 +197,9 @@ int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
                else
                        buf_set_u32(fields[1].out_value, 0, 7, 0);
 
-               fields[0].in_handler_priv = &data[i];
-               jtag_add_dr_scan(3, fields, TAP_INVALID);
+               jtag_add_dr_scan_now(3, fields, TAP_INVALID);
+
+               data[i]=buf_get_u32(tmp, 0, 32);
        }
 
        jtag_execute_queue();
@@ -262,34 +225,19 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        fields[0].tap = etb_reg->etb->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = reg->value;
-       fields[0].out_mask = NULL;
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
 
        fields[1].tap = etb_reg->etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
        fields[2].tap = etb_reg->etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 0);
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
 
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
@@ -299,10 +247,10 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
        buf_set_u32(fields[1].out_value, 0, 7, 0x0);
        fields[0].in_value = reg->value;
 
-       jtag_set_check_value(fields+0, check_value, check_mask, NULL);
-
        jtag_add_dr_scan(3, fields, TAP_INVALID);
 
+       jtag_check_value_mask(fields+0, check_value, check_mask);
+
        free(fields[1].out_value);
        free(fields[2].out_value);
 
@@ -317,6 +265,7 @@ int etb_read_reg(reg_t *reg)
 int etb_set_reg(reg_t *reg, u32 value)
 {
        int retval;
+
        if ((retval = etb_write_reg(reg, value)) != ERROR_OK)
        {
                LOG_ERROR("BUG: error scheduling etm register write");
@@ -333,6 +282,7 @@ int etb_set_reg(reg_t *reg, u32 value)
 int etb_set_reg_w_exec(reg_t *reg, u8 *buf)
 {
        int retval;
+
        etb_set_reg(reg, buf_get_u32(buf, 0, reg->size));
 
        if ((retval = jtag_execute_queue()) != ERROR_OK)
@@ -359,36 +309,20 @@ int etb_write_reg(reg_t *reg, u32 value)
        fields[0].num_bits = 32;
        fields[0].out_value = malloc(4);
        buf_set_u32(fields[0].out_value, 0, 32, value);
-       fields[0].out_mask = NULL;
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
 
        fields[1].tap = etb_reg->etb->tap;
        fields[1].num_bits = 7;
        fields[1].out_value = malloc(1);
        buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
        fields[2].tap = etb_reg->etb->tap;
        fields[2].num_bits = 1;
        fields[2].out_value = malloc(1);
        buf_set_u32(fields[2].out_value, 0, 1, 1);
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(3, fields, TAP_INVALID);
+       fields[2].in_value = NULL;
 
        free(fields[0].out_value);
        free(fields[1].out_value);
@@ -402,7 +336,7 @@ int etb_store_reg(reg_t *reg)
        return etb_write_reg(reg, buf_get_u32(reg->value, 0, reg->size));
 }
 
-int etb_register_commands(struct command_context_s *cmd_ctx)
+static int etb_register_commands(struct command_context_s *cmd_ctx)
 {
        command_t *etb_cmd;
 
@@ -413,7 +347,7 @@ int etb_register_commands(struct command_context_s *cmd_ctx)
        return ERROR_OK;
 }
 
-int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
        target_t *target;
        jtag_tap_t *tap;
@@ -440,12 +374,12 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
        }
 
        tap = jtag_TapByString( args[1] );
-       if( tap == NULL ){
+       if (tap == NULL)
+       {
                command_print(cmd_ctx, "Tap: %s does not exist", args[1] );
                return ERROR_FAIL;
        }
 
-
        if (arm7_9->etm_ctx)
        {
                etb_t *etb = malloc(sizeof(etb_t));
@@ -453,7 +387,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
                arm7_9->etm_ctx->capture_driver_priv = etb;
 
                etb->tap  = tap;
-               etb->cur_scan_chain = -1;
+               etb->cur_scan_chain = 0xffffffff;
                etb->reg_cache = NULL;
                etb->ram_width = 0;
                etb->ram_depth = 0;
@@ -467,7 +401,7 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
        return ERROR_OK;
 }
 
-int etb_init(etm_context_t *etm_ctx)
+static int etb_init(etm_context_t *etm_ctx)
 {
        etb_t *etb = etm_ctx->capture_driver_priv;
 
@@ -484,7 +418,7 @@ int etb_init(etm_context_t *etm_ctx)
        return ERROR_OK;
 }
 
-trace_status_t etb_status(etm_context_t *etm_ctx)
+static trace_status_t etb_status(etm_context_t *etm_ctx)
 {
        etb_t *etb = etm_ctx->capture_driver_priv;
 
@@ -539,7 +473,7 @@ trace_status_t etb_status(etm_context_t *etm_ctx)
        return etm_ctx->capture_status;
 }
 
-int etb_read_trace(etm_context_t *etm_ctx)
+static int etb_read_trace(etm_context_t *etm_ctx)
 {
        etb_t *etb = etm_ctx->capture_driver_priv;
        int first_frame = 0;
@@ -689,7 +623,7 @@ int etb_read_trace(etm_context_t *etm_ctx)
        return ERROR_OK;
 }
 
-int etb_start_capture(etm_context_t *etm_ctx)
+static int etb_start_capture(etm_context_t *etm_ctx)
 {
        etb_t *etb = etm_ctx->capture_driver_priv;
        u32 etb_ctrl_value = 0x1;
@@ -721,7 +655,7 @@ int etb_start_capture(etm_context_t *etm_ctx)
        return ERROR_OK;
 }
 
-int etb_stop_capture(etm_context_t *etm_ctx)
+static int etb_stop_capture(etm_context_t *etm_ctx)
 {
        etb_t *etb = etm_ctx->capture_driver_priv;
        reg_t *etb_ctrl_reg = &etb->reg_cache->reg_list[ETB_CTRL];