{
struct scan_field field;
- field.tap = tap;
field.num_bits = tap->ir_length;
- field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
- buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
+ void * t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
+ field.out_value = t;
+ buf_set_u32(t, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(1, &field, jtag_get_end_state());
+ jtag_add_ir_scan(tap, &field, TAP_IDLE);
- free(field.out_value);
+ free(t);
}
return ERROR_OK;
{
struct scan_field field;
- field.tap = etb->tap;
field.num_bits = 5;
- field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
- buf_set_u32(field.out_value, 0, field.num_bits, new_scan_chain);
+ void * t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
+ field.out_value = t;
+ buf_set_u32(t, 0, field.num_bits, new_scan_chain);
field.in_value = NULL;
/* select INTEST instruction */
etb_set_instr(etb, 0x2);
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(etb->tap, 1, &field, TAP_IDLE);
etb->cur_scan_chain = new_scan_chain;
- free(field.out_value);
+ free(t);
}
return ERROR_OK;
{
uint8_t *in = (uint8_t *)arg;
- *((uint32_t *)in) = buf_get_u32(in, 0, 32);
+ *((uint32_t *)arg) = buf_get_u32(in, 0, 32);
}
struct scan_field fields[3];
int i;
- jtag_set_end_state(TAP_IDLE);
etb_scann(etb, 0x0);
etb_set_instr(etb, 0xc);
- fields[0].tap = etb->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = NULL;
- fields[1].tap = etb->tap;
fields[1].num_bits = 7;
- fields[1].out_value = malloc(1);
- buf_set_u32(fields[1].out_value, 0, 7, 4);
+ uint8_t temp1;
+ fields[1].out_value = &temp1;
+ buf_set_u32(&temp1, 0, 7, 4);
fields[1].in_value = NULL;
- fields[2].tap = etb->tap;
fields[2].num_bits = 1;
- fields[2].out_value = malloc(1);
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ uint8_t temp2;
+ fields[2].out_value = &temp2;
+ buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(etb->tap, 3, fields, TAP_IDLE);
for (i = 0; i < num_frames; i++)
{
/* ensure nR/W reamins set to read */
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ buf_set_u32(&temp2, 0, 1, 0);
/* address remains set to 0x4 (RAM data) until we read the last frame */
if (i < num_frames - 1)
- buf_set_u32(fields[1].out_value, 0, 7, 4);
+ buf_set_u32(&temp1, 0, 7, 4);
else
- buf_set_u32(fields[1].out_value, 0, 7, 0);
+ buf_set_u32(&temp1, 0, 7, 0);
fields[0].in_value = (uint8_t *)(data + i);
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(etb->tap, 3, fields, TAP_IDLE);
jtag_add_callback(etb_getbuf, (jtag_callback_data_t)(data + i));
}
jtag_execute_queue();
- free(fields[1].out_value);
- free(fields[2].out_value);
-
return ERROR_OK;
}
LOG_DEBUG("%i", (int)(etb_reg->addr));
- jtag_set_end_state(TAP_IDLE);
etb_scann(etb_reg->etb, 0x0);
etb_set_instr(etb_reg->etb, 0xc);
- fields[0].tap = etb_reg->etb->tap;
fields[0].num_bits = 32;
fields[0].out_value = reg->value;
fields[0].in_value = NULL;
fields[0].check_value = NULL;
fields[0].check_mask = NULL;
- fields[1].tap = etb_reg->etb->tap;
fields[1].num_bits = 7;
- fields[1].out_value = malloc(1);
- buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+ uint8_t temp1;
+ fields[1].out_value = &temp1;
+ buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
fields[1].check_value = NULL;
fields[1].check_mask = NULL;
- fields[2].tap = etb_reg->etb->tap;
fields[2].num_bits = 1;
- fields[2].out_value = malloc(1);
- buf_set_u32(fields[2].out_value, 0, 1, 0);
+ uint8_t temp2;
+ fields[2].out_value = &temp2;
+ buf_set_u32(&temp2, 0, 1, 0);
fields[2].in_value = NULL;
fields[2].check_value = NULL;
fields[2].check_mask = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(etb_reg->etb->tap, 3, fields, TAP_IDLE);
/* read the identification register in the second run, to make sure we
* don't read the ETB data register twice, skipping every second entry
*/
- buf_set_u32(fields[1].out_value, 0, 7, 0x0);
+ buf_set_u32(&temp1, 0, 7, 0x0);
fields[0].in_value = reg->value;
fields[0].check_value = check_value;
fields[0].check_mask = check_mask;
- jtag_add_dr_scan_check(3, fields, jtag_get_end_state());
-
- free(fields[1].out_value);
- free(fields[2].out_value);
+ jtag_add_dr_scan_check(etb_reg->etb->tap, 3, fields, TAP_IDLE);
return ERROR_OK;
}
LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value);
- jtag_set_end_state(TAP_IDLE);
etb_scann(etb_reg->etb, 0x0);
etb_set_instr(etb_reg->etb, 0xc);
- fields[0].tap = etb_reg->etb->tap;
fields[0].num_bits = 32;
- fields[0].out_value = malloc(4);
- buf_set_u32(fields[0].out_value, 0, 32, value);
+ uint8_t temp0[4];
+ fields[0].out_value = temp0;
+ buf_set_u32(&temp0, 0, 32, value);
fields[0].in_value = NULL;
- fields[1].tap = etb_reg->etb->tap;
fields[1].num_bits = 7;
- fields[1].out_value = malloc(1);
- buf_set_u32(fields[1].out_value, 0, 7, reg_addr);
+ uint8_t temp1;
+ fields[1].out_value = &temp1;
+ buf_set_u32(&temp1, 0, 7, reg_addr);
fields[1].in_value = NULL;
- fields[2].tap = etb_reg->etb->tap;
fields[2].num_bits = 1;
- fields[2].out_value = malloc(1);
- buf_set_u32(fields[2].out_value, 0, 1, 1);
+ uint8_t temp2;
+ fields[2].out_value = &temp2;
+ buf_set_u32(&temp2, 0, 1, 1);
fields[2].in_value = NULL;
-
- free(fields[0].out_value);
- free(fields[1].out_value);
- free(fields[2].out_value);
-
return ERROR_OK;
}
static const struct command_registration etb_config_command_handlers[] = {
{
+ /* NOTE: with ADIv5, ETBs are accessed using DAP operations,
+ * possibly over SWD, not through separate TAPs...
+ */
.name = "config",
- .handler = &handle_etb_config_command,
+ .handler = handle_etb_config_command,
.mode = COMMAND_CONFIG,
+ .help = "Associate ETB with target and JTAG TAP.",
.usage = "target tap",
},
{
.name = "trigger_percent",
- .handler = &handle_etb_trigger_percent_command,
+ .handler = handle_etb_trigger_percent_command,
.mode = COMMAND_EXEC,
- .help = "percent of trace buffer to be filled "
- "after the trigger occurs",
+ .help = "Set percent of trace buffer to be filled "
+ "after the trigger occurs (2..100).",
.usage = "[percent]",
},
COMMAND_REGISTRATION_DONE
projects / fw / openocd / blobdiff