#include "config.h"
#endif
-#include "arm7_9_common.h"
+#include "armv4_5.h"
#include "etb.h"
static int etb_set_instr(etb_t *etb, uint32_t new_instr)
{
- jtag_tap_t *tap;
+ struct jtag_tap *tap;
tap = etb->tap;
if (tap == NULL)
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
{
- scan_field_t field;
+ struct scan_field field;
field.tap = tap;
field.num_bits = tap->ir_length;
{
if (etb->cur_scan_chain != new_scan_chain)
{
- scan_field_t field;
+ struct scan_field field;
field.tap = etb->tap;
field.num_bits = 5;
static int etb_read_ram(etb_t *etb, uint32_t *data, int num_frames)
{
- scan_field_t fields[3];
+ struct scan_field fields[3];
int i;
jtag_set_end_state(TAP_IDLE);
{
etb_reg_t *etb_reg = reg->arch_info;
uint8_t reg_addr = etb_reg->addr & 0x7f;
- scan_field_t fields[3];
+ struct scan_field fields[3];
LOG_DEBUG("%i", (int)(etb_reg->addr));
{
etb_reg_t *etb_reg = reg->arch_info;
uint8_t reg_addr = etb_reg->addr & 0x7f;
- scan_field_t fields[3];
+ struct scan_field fields[3];
LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value);
return ERROR_OK;
}
-static int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+COMMAND_HANDLER(handle_etb_config_command)
{
target_t *target;
- jtag_tap_t *tap;
- armv4_5_common_t *armv4_5;
- arm7_9_common_t *arm7_9;
+ struct jtag_tap *tap;
+ struct arm *arm;
if (argc != 2)
{
return ERROR_FAIL;
}
- if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
+ arm = target_to_arm(target);
+ if (!is_arm(arm))
{
- command_print(cmd_ctx, "ETB: current target isn't an ARM7/ARM9 target");
+ command_print(cmd_ctx, "ETB: '%s' isn't an ARM", args[0]);
return ERROR_FAIL;
}
return ERROR_FAIL;
}
- if (arm7_9->etm_ctx)
+ if (arm->etm)
{
etb_t *etb = malloc(sizeof(etb_t));
- arm7_9->etm_ctx->capture_driver_priv = etb;
+ arm->etm->capture_driver_priv = etb;
etb->tap = tap;
etb->cur_scan_chain = 0xffffffff;