arm_adi_v5: enhance command error reporting

[fw/openocd] / src / target / etb.c

diff --git a/src/target/etb.c b/src/target/etb.c
index 2ab35027169f4701dd81af97f01fd9c766b7021a..0c03c4dbec8a9b4bfdfe5307bb4048987d594500 100644 (file)
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -13,9 +13,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -27,7 +25,7 @@
 #include "etb.h"
 #include "register.h"
 
-static char *etb_reg_list[] = {
+static const char * const etb_reg_list[] = {
        "ETB_identification",
        "ETB_ram_depth",
        "ETB_ram_width",
@@ -145,8 +143,8 @@ struct reg_cache *etb_build_reg_cache(struct etb *etb)
        for (i = 0; i < num_regs; i++) {
                reg_list[i].name = etb_reg_list[i];
                reg_list[i].size = 32;
-               reg_list[i].dirty = 0;
-               reg_list[i].valid = 0;
+               reg_list[i].dirty = false;
+               reg_list[i].valid = false;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].arch_info = &arch_info[i];
                reg_list[i].type = &etb_reg_type;
@@ -178,13 +176,13 @@ static int etb_read_ram(struct etb *etb, uint32_t *data, int num_frames)
        fields[0].in_value = NULL;
 
        fields[1].num_bits = 7;
-       uint8_t temp1;
+       uint8_t temp1 = 0;
        fields[1].out_value = &temp1;
        buf_set_u32(&temp1, 0, 7, 4);
        fields[1].in_value = NULL;
 
        fields[2].num_bits = 1;
-       uint8_t temp2;
+       uint8_t temp2 = 0;
        fields[2].out_value = &temp2;
        buf_set_u32(&temp2, 0, 1, 0);
        fields[2].in_value = NULL;
@@ -231,7 +229,7 @@ static int etb_read_reg_w_check(struct reg *reg,
        fields[0].check_mask = NULL;
 
        fields[1].num_bits = 7;
-       uint8_t temp1;
+       uint8_t temp1 = 0;
        fields[1].out_value = &temp1;
        buf_set_u32(&temp1, 0, 7, reg_addr);
        fields[1].in_value = NULL;
@@ -239,7 +237,7 @@ static int etb_read_reg_w_check(struct reg *reg,
        fields[1].check_mask = NULL;
 
        fields[2].num_bits = 1;
-       uint8_t temp2;
+       uint8_t temp2 = 0;
        fields[2].out_value = &temp2;
        buf_set_u32(&temp2, 0, 1, 0);
        fields[2].in_value = NULL;
@@ -274,8 +272,8 @@ static int etb_set_reg(struct reg *reg, uint32_t value)
        }
 
        buf_set_u32(reg->value, 0, reg->size, value);
-       reg->valid = 1;
-       reg->dirty = 0;
+       reg->valid = true;
+       reg->dirty = false;
 
        return ERROR_OK;
 }
@@ -308,17 +306,17 @@ static int etb_write_reg(struct reg *reg, uint32_t value)
        fields[0].num_bits = 32;
        uint8_t temp0[4];
        fields[0].out_value = temp0;
-       buf_set_u32(&temp0, 0, 32, value);
+       buf_set_u32(temp0, 0, 32, value);
        fields[0].in_value = NULL;
 
        fields[1].num_bits = 7;
-       uint8_t temp1;
+       uint8_t temp1 = 0;
        fields[1].out_value = &temp1;
        buf_set_u32(&temp1, 0, 7, reg_addr);
        fields[1].in_value = NULL;
 
        fields[2].num_bits = 1;
-       uint8_t temp2;
+       uint8_t temp2 = 0;
        fields[2].out_value = &temp2;
        buf_set_u32(&temp2, 0, 1, 1);
        fields[2].in_value = NULL;
@@ -346,13 +344,13 @@ COMMAND_HANDLER(handle_etb_config_command)
 
        arm = target_to_arm(target);
        if (!is_arm(arm)) {
-               command_print(CMD_CTX, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
+               command_print(CMD, "ETB: '%s' isn't an ARM", CMD_ARGV[0]);
                return ERROR_FAIL;
        }
 
        tap = jtag_tap_by_string(CMD_ARGV[1]);
        if (tap == NULL) {
-               command_print(CMD_CTX, "ETB: TAP %s does not exist", CMD_ARGV[1]);
+               command_print(CMD, "ETB: TAP %s does not exist", CMD_ARGV[1]);
                return ERROR_FAIL;
        }
 
@@ -384,17 +382,17 @@ COMMAND_HANDLER(handle_etb_trigger_percent_command)
        target = get_current_target(CMD_CTX);
        arm = target_to_arm(target);
        if (!is_arm(arm)) {
-               command_print(CMD_CTX, "ETB: current target isn't an ARM");
+               command_print(CMD, "ETB: current target isn't an ARM");
                return ERROR_FAIL;
        }
 
        etm = arm->etm;
        if (!etm) {
-               command_print(CMD_CTX, "ETB: target has no ETM configured");
+               command_print(CMD, "ETB: target has no ETM configured");
                return ERROR_FAIL;
        }
        if (etm->capture_driver != &etb_capture_driver) {
-               command_print(CMD_CTX, "ETB: target not using ETB");
+               command_print(CMD, "ETB: target not using ETB");
                return ERROR_FAIL;
        }
        etb = arm->etm->capture_driver_priv;
@@ -404,13 +402,13 @@ COMMAND_HANDLER(handle_etb_trigger_percent_command)
 
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], new_value);
                if ((new_value < 2) || (new_value > 100))
-                       command_print(CMD_CTX,
+                       command_print(CMD,
                                "valid percentages are 2%% to 100%%");
                else
                        etb->trigger_percent = (unsigned) new_value;
        }
 
-       command_print(CMD_CTX, "%d percent of tracebuffer fills after trigger",
+       command_print(CMD, "%d percent of tracebuffer fills after trigger",
                etb->trigger_percent);
 
        return ERROR_OK;
@@ -443,6 +441,7 @@ static const struct command_registration etb_command_handlers[] = {
                .mode = COMMAND_ANY,
                .help = "Embedded Trace Buffer command group",
                .chain = etb_config_command_handlers,
+               .usage = "",
        },
        COMMAND_REGISTRATION_DONE
 };