flash/nor/at91samd: Use 32-bit register writes for ST-Link compat

[fw/openocd] / src / target / esirisc.h

diff --git a/src/target/esirisc.h b/src/target/esirisc.h
index bb50652aa86e08c335e3f9133e970e59619d49c1..7496b1eda7a51ffab7d3a30761860bb7e6b3311b 100644 (file)
--- a/src/target/esirisc.h
+++ b/src/target/esirisc.h
@@ -1,31 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2018 by Square, Inc.                                    *
  *   Steven Stallion <stallion@squareup.com>                               *
  *   James Zhao <hjz@squareup.com>                                         *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifndef OPENOCD_TARGET_ESIRISC_H
 #define OPENOCD_TARGET_ESIRISC_H
 
+#include <helper/types.h>
 #include <target/breakpoints.h>
 #include <target/register.h>
 #include <target/target.h>
 
 #include "esirisc_jtag.h"
 #include "esirisc_regs.h"
+#include "esirisc_trace.h"
 
 #define MAX_BREAKPOINTS                        8
 #define MAX_WATCHPOINTS                        8
@@ -45,7 +36,7 @@
 #define EID_SYSTEM_CALL                        0x0b
 #define EID_MEMORY_MANAGEMENT  0x0c
 #define EID_UNRECOVERABLE              0x0d
-#define EID_INTERRUPTn                 0x20
+#define EID_INTERRUPT_N                        0x20
 
 /* Exception Entry Points */
 #define ENTRY_RESET                            0x00
@@ -56,7 +47,7 @@
 #define ENTRY_SYSCALL                  0x05
 #define ENTRY_DEBUG                            0x06
 #define ENTRY_NMI                              0x07
-#define ENTRY_INTERRUPTn               0x08
+#define ENTRY_INTERRUPT_N              0x08
 
 /* Hardware Debug Control */
 #define HWDC_R                                 (1<<4)  /* Reset & Hardware Failure */
@@ -88,11 +79,15 @@ struct esirisc_common {
        int num_regs;
        bool has_icache;
        bool has_dcache;
-       int num_breakpoints;
-       int num_watchpoints;
+       bool has_trace;
 
+       int num_breakpoints;
        struct breakpoint *breakpoints_p[MAX_BREAKPOINTS];
+
+       int num_watchpoints;
        struct watchpoint *watchpoints_p[MAX_WATCHPOINTS];
+
+       struct esirisc_trace trace_info;
 };
 
 union esirisc_memory {
@@ -116,7 +111,7 @@ static inline struct esirisc_common *target_to_esirisc(struct target *target)
        return (struct esirisc_common *)target->arch_info;
 }
 
-static inline char *esirisc_cache_arch(struct esirisc_common *esirisc)
+static inline char *esirisc_cache_arch_name(struct esirisc_common *esirisc)
 {
        return esirisc->cache_arch == ESIRISC_CACHE_HARVARD ? "harvard" : "von_neumann";
 }