- added myself to copyright on files i remember adding large contributions for over...

[fw/openocd] / src / target / embeddedice.h

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index e038f92d06cd13bd88ce9a7814875b5258f4f29c..aeb78a74880754fcc66cd21c7a990e690ebc5e35 100644 (file)
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -1,7 +1,13 @@
 /***************************************************************************
- *   Copyright (C) 2005 by Dominic Rath                                    *
+ *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   oyvind.harboe@zylin.com                                               *
+ *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -23,6 +29,7 @@
 #include "target.h"
 #include "register.h"
 #include "arm_jtag.h"
+#include "arm7_9_common.h"
 
 enum
 {
@@ -41,13 +48,14 @@ enum
        EICE_W1_DATA_VALUE = 12,
        EICE_W1_DATA_MASK = 13,
        EICE_W1_CONTROL_VALUE = 14,
-       EICE_W1_CONTROL_MASK = 15
+       EICE_W1_CONTROL_MASK = 15,
+       EICE_VEC_CATCH = 16
 };
 
 enum
 {
        EICE_DBG_CONTROL_ICEDIS = 5,
-       EICE_DBG_CONTROL_MONEN = 4,     
+       EICE_DBG_CONTROL_MONEN = 4,
        EICE_DBG_CONTROL_INTDIS = 2,
        EICE_DBG_CONTROL_DBGRQ = 1,
        EICE_DBG_CONTROL_DBGACK = 0,
@@ -55,6 +63,7 @@ enum
 
 enum
 {
+       EICE_DBG_STATUS_IJBIT = 5,
        EICE_DBG_STATUS_ITBIT = 4,
        EICE_DBG_STATUS_SYSCOMP = 3,
        EICE_DBG_STATUS_IFEN = 2,
@@ -87,12 +96,38 @@ typedef struct embeddedice_reg_s
        arm_jtag_t *jtag_info;
 } embeddedice_reg_t;
 
-extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, int extra_reg);
+extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
+extern int embeddedice_setup(target_t *target);
 extern int embeddedice_read_reg(reg_t *reg);
 extern int embeddedice_write_reg(reg_t *reg, u32 value);
 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
 extern int embeddedice_store_reg(reg_t *reg);
 extern int embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u32 value);
+extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
+extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
+extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
+
+/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
+ * embeddedice_write_reg
+ */
+static const int embeddedice_num_bits[]={32,5,1};
+static __inline__ void embeddedice_write_reg_inner(int chain_pos, int reg_addr, u32 value)
+{
+       u32 values[3];
+
+       values[0]=value;
+       values[1]=reg_addr;
+       values[2]=1;
+
+       jtag_add_dr_out(chain_pos,
+                       3,
+                       embeddedice_num_bits,
+                       values,
+                       -1);
+}
+
+void embeddedice_write_dcc(int chain_pos, int reg_addr, u8 *buffer, int little, int count);
+
 
 #endif /* EMBEDDED_ICE_H */