target/target: read_memory 64-bit bugfix

[fw/openocd] / src / target / embeddedice.h

diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 1faa1eeba620f87356d76251b7add24988eca708..32acd705a57ca1e3f6775ef861bd7e9f00d4e394 100644 (file)
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005, 2006 by Dominic Rath                              *
  *   Dominic.Rath@gmx.de                                                   *
@@ -7,29 +9,14 @@
  *                                                                         *
  *   Copyright (C) 2008 by Spencer Oliver                                  *
  *   spen@spen-soft.co.uk                                                  *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
-#ifndef EMBEDDED_ICE_H
-#define EMBEDDED_ICE_H
 
-#include <target/arm7_9_common.h>
+#ifndef OPENOCD_TARGET_EMBEDDEDICE_H
+#define OPENOCD_TARGET_EMBEDDEDICE_H
 
-enum
-{
+#include "arm7_9_common.h"
+
+enum {
        EICE_DBG_CTRL = 0,
        EICE_DBG_STAT = 1,
        EICE_COMMS_CTRL = 2,
@@ -49,8 +36,7 @@ enum
        EICE_VEC_CATCH = 16
 };
 
-enum
-{
+enum {
        EICE_DBG_CONTROL_ICEDIS = 5,
        EICE_DBG_CONTROL_MONEN = 4,
        EICE_DBG_CONTROL_INTDIS = 2,
@@ -58,8 +44,7 @@ enum
        EICE_DBG_CONTROL_DBGACK = 0,
 };
 
-enum
-{
+enum {
        EICE_DBG_STATUS_IJBIT = 5,
        EICE_DBG_STATUS_ITBIT = 4,
        EICE_DBG_STATUS_SYSCOMP = 3,
@@ -68,70 +53,66 @@ enum
        EICE_DBG_STATUS_DBGACK = 0
 };
 
-enum
-{
+enum {
        EICE_W_CTRL_ENABLE = 0x100,
        EICE_W_CTRL_RANGE = 0x80,
        EICE_W_CTRL_CHAIN = 0x40,
        EICE_W_CTRL_EXTERN = 0x20,
-       EICE_W_CTRL_nTRANS = 0x10,
-       EICE_W_CTRL_nOPC = 0x8,
+       EICE_W_CTRL_NTRANS = 0x10,
+       EICE_W_CTRL_NOPC = 0x8,
        EICE_W_CTRL_MAS = 0x6,
        EICE_W_CTRL_ITBIT = 0x2,
-       EICE_W_CTRL_nRW = 0x1
+       EICE_W_CTRL_NRW = 0x1
 };
 
-enum
-{
+enum {
        EICE_COMM_CTRL_WBIT = 1,
        EICE_COMM_CTRL_RBIT = 0
 };
 
-struct embeddedice_reg
-{
+struct embeddedice_reg {
        int addr;
        struct arm_jtag *jtag_info;
 };
 
-struct reg_cache* embeddedice_build_reg_cache(struct target *target,
+struct reg_cache *embeddedice_build_reg_cache(struct target *target,
                struct arm7_9_common *arm7_9);
+void embeddedice_free_reg_cache(struct reg_cache *reg_cache);
 
 int embeddedice_setup(struct target *target);
 
 int embeddedice_read_reg(struct reg *reg);
 int embeddedice_read_reg_w_check(struct reg *reg,
-               uint8_t* check_value, uint8_t* check_mask);
+               uint8_t *check_value, uint8_t *check_mask);
 
 void embeddedice_write_reg(struct reg *reg, uint32_t value);
 void embeddedice_store_reg(struct reg *reg);
 
 void embeddedice_set_reg(struct reg *reg, uint32_t value);
-int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf);
 
 int embeddedice_receive(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
 int embeddedice_send(struct arm_jtag *jtag_info, uint32_t *data, uint32_t size);
 
 int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeout);
 
-/* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
- * embeddedice_write_reg
+/* If many embeddedice_write_reg() follow each other, then the >1 invocations can be
+ * this faster version of embeddedice_write_reg
  */
-static __inline__ void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
+static inline void embeddedice_write_reg_inner(struct jtag_tap *tap, int reg_addr, uint32_t value)
 {
-       static const int embeddedice_num_bits[]={32,5,1};
-       uint32_t values[3];
-
-       values[0]=value;
-       values[1]=reg_addr;
-       values[2]=1;
-
-       jtag_add_dr_out(tap,
-                       3,
-                       embeddedice_num_bits,
-                       values,
-                       jtag_get_end_state());
+       uint8_t out_reg_addr = (1 << 5) | reg_addr;
+       uint8_t out_value[4];
+       buf_set_u32(out_value, 0, 32, value);
+
+       struct scan_field fields[2] = {
+                       { .num_bits = 32, .out_value = out_value },
+                       { .num_bits = 6, .out_value = &out_reg_addr },
+       };
+
+       jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
 }
 
-void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count);
+void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, const uint8_t *buffer,
+               int little, int count);
 
-#endif /* EMBEDDED_ICE_H */
+#endif /* OPENOCD_TARGET_EMBEDDEDICE_H */