stlink: add missing memory check handlers

[fw/openocd] / src / target / embeddedice.c

diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 5502ad8a8a58590ef184e6d79df3e4efa5682aa1..77e85df4c5956bd5ed2305f7b8be920df8ffbbbb 100644 (file)
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -497,13 +497,12 @@ static int embeddedice_set_reg_w_exec(struct reg *reg, uint8_t *buf)
 void embeddedice_write_reg(struct reg *reg, uint32_t value)
 {
        struct embeddedice_reg *ice_reg = reg->arch_info;
-       int retval;
 
        LOG_DEBUG("%i: 0x%8.8" PRIx32 "", ice_reg->addr, value);
 
-       retval = arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
+       arm_jtag_scann(ice_reg->jtag_info, 0x2, TAP_IDLE);
 
-       retval = arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
+       arm_jtag_set_instr(ice_reg->jtag_info, ice_reg->jtag_info->intest_instr, NULL, TAP_IDLE);
 
        uint8_t reg_addr = ice_reg->addr & 0x1f;
        embeddedice_write_reg_inner(ice_reg->jtag_info->tap, reg_addr, value);
@@ -590,7 +589,7 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
        else
        {
                LOG_ERROR("Invalid arguments");
-               return ERROR_INVALID_ARGUMENTS;
+               return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
        retval = arm_jtag_scann(jtag_info, 0x2, TAP_IDLE);
@@ -637,7 +636,7 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
  * This is an inner loop of the open loop DCC write of data to target
  */
 void embeddedice_write_dcc(struct jtag_tap *tap,
-               int reg_addr, uint8_t *buffer, int little, int count)
+               int reg_addr, const uint8_t *buffer, int little, int count)
 {
        int i;