cortex_m: read and display core security state
[fw/openocd] / src / target / dsp563xx.c
index e7306d2e4e84f9fc73dbf27b0a8d8ac52eadce68..b825429e0b18ab50262dea954c4ecea66048ca94 100644 (file)
@@ -322,7 +322,7 @@ enum watchpoint_condition {
 #define INSTR_JUMP      0x0AF080
 /* Effective Addressing Mode Encoding */
 #define EAME_R0         0x10
-/* instrcution encoder */
+/* instruction encoder */
 /* movep
  * s - peripheral space X/Y (X=0,Y=1)
  * w - write/read
@@ -384,8 +384,8 @@ static int dsp563xx_read_core_reg(struct target *target, int num)
 
        reg_value = dsp563xx->core_regs[num];
        buf_set_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32, reg_value);
-       dsp563xx->core_cache->reg_list[num].valid = 1;
-       dsp563xx->core_cache->reg_list[num].dirty = 0;
+       dsp563xx->core_cache->reg_list[num].valid = true;
+       dsp563xx->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -400,8 +400,8 @@ static int dsp563xx_write_core_reg(struct target *target, int num)
 
        reg_value = buf_get_u32(dsp563xx->core_cache->reg_list[num].value, 0, 32);
        dsp563xx->core_regs[num] = reg_value;
-       dsp563xx->core_cache->reg_list[num].valid = 1;
-       dsp563xx->core_cache->reg_list[num].dirty = 0;
+       dsp563xx->core_cache->reg_list[num].valid = true;
+       dsp563xx->core_cache->reg_list[num].dirty = false;
 
        return ERROR_OK;
 }
@@ -432,8 +432,8 @@ static int dsp563xx_set_core_reg(struct reg *reg, uint8_t *buf)
                return ERROR_TARGET_NOT_HALTED;
 
        buf_set_u32(reg->value, 0, reg->size, value);
-       reg->dirty = 1;
-       reg->valid = 1;
+       reg->dirty = true;
+       reg->valid = true;
 
        return ERROR_OK;
 }
@@ -473,8 +473,9 @@ static void dsp563xx_build_reg_cache(struct target *target)
                reg_list[i].name = dsp563xx_regs[i].name;
                reg_list[i].size = 32;  /* dsp563xx_regs[i].bits; */
                reg_list[i].value = calloc(1, 4);
-               reg_list[i].dirty = 0;
-               reg_list[i].valid = 0;
+               reg_list[i].dirty = false;
+               reg_list[i].valid = false;
+               reg_list[i].exist = true;
                reg_list[i].type = &dsp563xx_reg_type;
                reg_list[i].arch_info = &arch_info[i];
        }
@@ -508,7 +509,7 @@ static int dsp563xx_reg_read_high_io(struct target *target, uint32_t instr_mask,
        if (err != ERROR_OK)
                return err;
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
 
        return ERROR_OK;
 }
@@ -534,7 +535,7 @@ static int dsp563xx_reg_write_high_io(struct target *target, uint32_t instr_mask
                return err;
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
 
        return ERROR_OK;
 }
@@ -745,7 +746,7 @@ static int dsp563xx_read_register(struct target *target, int num, int force)
        struct dsp563xx_core_reg *arch_info;
 
        if (force)
-               dsp563xx->core_cache->reg_list[num].valid = 0;
+               dsp563xx->core_cache->reg_list[num].valid = false;
 
        if (!dsp563xx->core_cache->reg_list[num].valid) {
                arch_info = dsp563xx->core_cache->reg_list[num].arch_info;
@@ -795,7 +796,7 @@ static int dsp563xx_write_register(struct target *target, int num, int force)
        struct dsp563xx_core_reg *arch_info;
 
        if (force)
-               dsp563xx->core_cache->reg_list[num].dirty = 1;
+               dsp563xx->core_cache->reg_list[num].dirty = true;
 
        if (dsp563xx->core_cache->reg_list[num].dirty) {
                arch_info = dsp563xx->core_cache->reg_list[num].arch_info;
@@ -884,8 +885,8 @@ static void dsp563xx_invalidate_x_context(struct target *target,
 
                if ((arch_info->instr_mask >= addr_start) &&
                        (arch_info->instr_mask <= addr_end)) {
-                       dsp563xx->core_cache->reg_list[i].valid = 0;
-                       dsp563xx->core_cache->reg_list[i].dirty = 0;
+                       dsp563xx->core_cache->reg_list[i].valid = false;
+                       dsp563xx->core_cache->reg_list[i].dirty = false;
                }
        }
 }
@@ -936,7 +937,7 @@ static int dsp563xx_examine(struct target *target)
                if (((chip>>5)&0x1f) == 0)
                        chip += 300;
 
-               LOG_INFO("DSP56%03" PRId32 " device found", chip);
+               LOG_INFO("DSP56%03" PRIu32 " device found", chip);
 
                /* Clear all breakpoints */
                dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OBCR, 0);
@@ -985,7 +986,7 @@ static int dsp563xx_debug_init(struct target *target)
                err = dsp563xx_once_execute_dw_ir(target->tap, 1, arch_info->instr_mask, sr);
                if (err != ERROR_OK)
                        return err;
-               dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SR].dirty = 1;
+               dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_SR].dirty = true;
        }
 
        err = dsp563xx_read_register(target, DSP563XX_REG_IDX_N0, 0);
@@ -1007,7 +1008,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N0].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_N1] != 0x000000) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].arch_info;
@@ -1015,7 +1016,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_N1].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_M0] != 0xffffff) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].arch_info;
@@ -1023,7 +1024,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M0].dirty = true;
 
        if (dsp563xx->core_regs[DSP563XX_REG_IDX_M1] != 0xffffff) {
                arch_info = dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].arch_info;
@@ -1031,7 +1032,7 @@ static int dsp563xx_debug_init(struct target *target)
                if (err != ERROR_OK)
                        return err;
        }
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_M1].dirty = true;
 
        err = dsp563xx_save_context(target);
        if (err != ERROR_OK)
@@ -1358,7 +1359,7 @@ static int dsp563xx_deassert_reset(struct target *target)
                if (target->state == TARGET_HALTED) {
                        /* after a reset the cpu jmp to the
                         * reset vector and need 2 cycles to fill
-                        * the cache (fetch,decode,excecute)
+                        * the cache (fetch,decode,execute)
                         */
                        err = dsp563xx_step_ex(target, 1, 0, 1, 1);
                        if (err != ERROR_OK)
@@ -1387,6 +1388,8 @@ static int dsp563xx_run_algorithm(struct target *target,
        }
 
        for (i = 0; i < num_mem_params; i++) {
+               if (mem_params[i].direction == PARAM_IN)
+                       continue;
                retval = target_write_buffer(target, mem_params[i].address,
                                mem_params[i].size, mem_params[i].value);
                if (retval != ERROR_OK)
@@ -1550,9 +1553,9 @@ static int dsp563xx_read_memory_core(struct target *target,
                dsp563xx->read_core_reg(target, DSP563XX_REG_IDX_R1);
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
        /* r1 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = true;
 
        x = count;
        b = buffer;
@@ -1732,9 +1735,9 @@ static int dsp563xx_write_memory_core(struct target *target,
                dsp563xx->read_core_reg(target, DSP563XX_REG_IDX_R1);
 
        /* r0 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R0].dirty = true;
        /* r1 is no longer valid on target */
-       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = 1;
+       dsp563xx->core_cache->reg_list[DSP563XX_REG_IDX_R1].dirty = true;
 
        x = count;
        b = buffer;
@@ -1873,67 +1876,6 @@ static int dsp563xx_remove_watchpoint(struct target *target, struct watchpoint *
        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 }
 
-static void handle_md_output(struct command_context *cmd_ctx,
-       struct target *target,
-       uint32_t address,
-       unsigned size,
-       unsigned count,
-       const uint8_t *buffer)
-{
-       const unsigned line_bytecnt = 32;
-       unsigned line_modulo = line_bytecnt / size;
-
-       char output[line_bytecnt * 4 + 1];
-       unsigned output_len = 0;
-
-       const char *value_fmt;
-       switch (size) {
-               case 4:
-                       value_fmt = "%8.8x ";
-                       break;
-               case 2:
-                       value_fmt = "%4.4x ";
-                       break;
-               case 1:
-                       value_fmt = "%2.2x ";
-                       break;
-               default:
-                       /* "can't happen", caller checked */
-                       LOG_ERROR("invalid memory read size: %u", size);
-                       return;
-       }
-
-       for (unsigned i = 0; i < count; i++) {
-               if (i % line_modulo == 0)
-                       output_len += snprintf(output + output_len,
-                                       sizeof(output) - output_len,
-                                       "0x%8.8x: ",
-                                       (unsigned) (address + i));
-
-               uint32_t value = 0;
-               const uint8_t *value_ptr = buffer + i * size;
-               switch (size) {
-                       case 4:
-                               value = target_buffer_get_u32(target, value_ptr);
-                               break;
-                       case 2:
-                               value = target_buffer_get_u16(target, value_ptr);
-                               break;
-                       case 1:
-                               value = *value_ptr;
-               }
-               output_len += snprintf(output + output_len,
-                               sizeof(output) - output_len,
-                               value_fmt,
-                               value);
-
-               if ((i % line_modulo == line_modulo - 1) || (i == count - 1)) {
-                       command_print(cmd_ctx, "%s", output);
-                       output_len = 0;
-               }
-       }
-}
-
 static int dsp563xx_add_custom_watchpoint(struct target *target, uint32_t address, uint32_t memType,
                enum watchpoint_rw rw, enum watchpoint_condition cond)
 {
@@ -2206,7 +2148,7 @@ COMMAND_HANDLER(dsp563xx_mem_command)
                err = dsp563xx_read_memory(target, mem_type, address, sizeof(uint32_t),
                                count, buffer);
                if (err == ERROR_OK)
-                       handle_md_output(CMD_CTX, target, address, sizeof(uint32_t), count, buffer);
+                       target_handle_md_output(CMD, target, address, sizeof(uint32_t), count, buffer);
 
        } else {
                b = buffer;