mips_ejtag_t -> struct mips_ejtag

[fw/openocd] / src / target / cortex_m3.h

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index f4cefa7803256e5e5768611eedefe6338901e1a1..b2d558d1fbf4498b5f6f3304f929955653d4319f 100644 (file)
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -45,6 +45,7 @@
 #define DCRSR_WnR      (1 << 16)
 
 #define DWT_CTRL       0xE0001000
+#define DWT_CYCCNT     0xE0001004
 #define DWT_COMP0      0xE0001020
 #define DWT_MASK0      0xE0001024
 #define DWT_FUNCTION0  0xE0001028
@@ -60,8 +61,6 @@
 #define FP_COMP6       0xE0002020
 #define FP_COMP7       0xE0002024
 
-#define DWT_CTRL       0xE0001000
-
 /* DCB_DHCSR bit and field definitions */
 #define DBGKEY         (0xA05F << 16)
 #define C_DEBUGEN      (1 << 0)
@@ -137,10 +136,10 @@ typedef struct  cortex_m3_dwt_comparator_s
        uint32_t dwt_comparator_address;
 } cortex_m3_dwt_comparator_t;
 
-typedef struct cortex_m3_common_s
+struct cortex_m3_common
 {
        int common_magic;
-       arm_jtag_t jtag_info;
+       struct arm_jtag jtag_info;
 
        /* Context information */
        uint32_t dcb_dhcsr;
@@ -159,13 +158,16 @@ typedef struct cortex_m3_common_s
        int dwt_num_comp;
        int dwt_comp_available;
        cortex_m3_dwt_comparator_t *dwt_comparator_list;
+       struct reg_cache_s *dwt_cache;
 
-       /* Interrupts */
-       int intlinesnum;
-       uint32_t *intsetenable;
+       struct armv7m_common armv7m;
+};
 
-       armv7m_common_t armv7m;
-       void *arch_info;
-} cortex_m3_common_t;
+static inline struct cortex_m3_common *
+target_to_cm3(struct target_s *target)
+{
+       return container_of(target->arch_info,
+                       struct cortex_m3_common, armv7m);
+}
 
 #endif /* CORTEX_M3_H */