- Fixes '==' whitespace

[fw/openocd] / src / target / cortex_m3.h

diff --git a/src/target/cortex_m3.h b/src/target/cortex_m3.h
index ae772543bff78b223838b6f94e13365fd1672375..70605469e3f2268b16e10019dfe313c447247994 100644 (file)
--- a/src/target/cortex_m3.h
+++ b/src/target/cortex_m3.h
@@ -44,7 +44,7 @@ extern char* cortex_m3_state_strings[];
 #define DCB_DCRDR      0xE000EDF8
 #define DCB_DEMCR      0xE000EDFC
 
-#define DCRSR_WnR      (1<<16) 
+#define DCRSR_WnR      (1 << 16)       
 
 #define DWT_CTRL       0xE0001000
 #define DWT_COMP0      0xE0001020
@@ -65,23 +65,23 @@ extern char* cortex_m3_state_strings[];
 #define DWT_CTRL       0xE0001000
 
 /* DCB_DHCSR bit and field definitions */
-#define DBGKEY         (0xA05F<<16)
-#define C_DEBUGEN      (1<<0)
-#define C_HALT         (1<<1)
-#define C_STEP         (1<<2)
-#define C_MASKINTS     (1<<3)
-#define S_REGRDY       (1<<16)
-#define S_HALT         (1<<17)
-#define S_SLEEP                (1<<18)
-#define S_LOCKUP       (1<<19)
-#define S_RETIRE_ST    (1<<24)
-#define S_RESET_ST     (1<<25)
+#define DBGKEY         (0xA05F << 16)
+#define C_DEBUGEN      (1 << 0)
+#define C_HALT         (1 << 1)
+#define C_STEP         (1 << 2)
+#define C_MASKINTS     (1 << 3)
+#define S_REGRDY       (1 << 16)
+#define S_HALT         (1 << 17)
+#define S_SLEEP                (1 << 18)
+#define S_LOCKUP       (1 << 19)
+#define S_RETIRE_ST    (1 << 24)
+#define S_RESET_ST     (1 << 25)
 
 /* DCB_DEMCR bit and field definitions */
-#define        TRCENA                  (1<<24)
-#define        VC_HARDERR              (1<<10)
-#define        VC_BUSERR               (1<<8)
-#define        VC_CORERESET    (1<<0)
+#define        TRCENA                  (1 << 24)
+#define        VC_HARDERR              (1 << 10)
+#define        VC_BUSERR               (1 << 8)
+#define        VC_CORERESET    (1 << 0)
 
 #define NVIC_ICTR              0xE000E004
 #define NVIC_ISE0              0xE000E100
@@ -98,12 +98,12 @@ extern char* cortex_m3_state_strings[];
 #define NVIC_BFAR              0xE000ED38
 
 /* NVIC_AIRCR bits */
-#define AIRCR_VECTKEY          (0x5FA<<16)
-#define AIRCR_SYSRESETREQ      (1<<2)
-#define AIRCR_VECTCLRACTIVE    (1<<1)
-#define AIRCR_VECTRESET                (1<<0)
+#define AIRCR_VECTKEY          (0x5FA << 16)
+#define AIRCR_SYSRESETREQ      (1 << 2)
+#define AIRCR_VECTCLRACTIVE    (1 << 1)
+#define AIRCR_VECTRESET                (1 << 0)
 /* NVIC_SHCSR bits */
-#define SHCSR_BUSFAULTENA      (1<<17)
+#define SHCSR_BUSFAULTENA      (1 << 17)
 /* NVIC_DFSR bits */
 #define DFSR_HALTED                    1
 #define DFSR_BKPT                      2
@@ -112,10 +112,10 @@ extern char* cortex_m3_state_strings[];
 
 #define FPCR_CODE 0
 #define FPCR_LITERAL 1
-#define FPCR_REPLACE_REMAP  (0<<30)
-#define FPCR_REPLACE_BKPT_LOW  (1<<30)
-#define FPCR_REPLACE_BKPT_HIGH  (2<<30)
-#define FPCR_REPLACE_BKPT_BOTH  (3<<30)
+#define FPCR_REPLACE_REMAP  (0 << 30)
+#define FPCR_REPLACE_BKPT_LOW  (1 << 30)
+#define FPCR_REPLACE_BKPT_HIGH  (2 << 30)
+#define FPCR_REPLACE_BKPT_BOTH  (3 << 30)
 
 typedef struct  cortex_m3_fp_comparator_s
 {