change jtag_add_callback API to be able to support check_value/mask
[fw/openocd] / src / target / cortex_m3.h
index 4b2c235cc40af1fc411c4926673eda9121ea4c28..19c7c3b558bbe07b734ed5a9ea42498a99319276 100644 (file)
@@ -29,7 +29,7 @@
 #include "register.h"
 #include "target.h"
 #include "armv7m.h"
-#include "cortex_swjdp.h"
+//#include "arm_adi_v5.h"
 
 extern char* cortex_m3_state_strings[];
 
@@ -138,21 +138,21 @@ typedef struct cortex_m3_common_s
 {
        int common_magic;
        arm_jtag_t jtag_info;
-       char *variant;
        
        /* Context information */
        u32 dcb_dhcsr;
        u32 nvic_dfsr;  /* Debug Fault Status Register - shows reason for debug halt */
        u32 nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
        
-       /* Flash Patch and Breakpoint */
+       /* Flash Patch and Breakpoint (FPB) */
        int fp_num_lit;
        int fp_num_code;
        int fp_code_available;
+       int fpb_enabled;
        int auto_bp_type;
        cortex_m3_fp_comparator_t *fp_comparator_list;
        
-       /* DWT */
+       /* Data Watchpoint and Trace (DWT) */
        int dwt_num_comp;
        int dwt_comp_available;
        cortex_m3_dwt_comparator_t *dwt_comparator_list;
@@ -162,7 +162,7 @@ typedef struct cortex_m3_common_s
        u32 *intsetenable;
        
        armv7m_common_t armv7m;
-       swjdp_common_t swjdp_info;
+//     swjdp_common_t swjdp_info;
        void *arch_info;
 } cortex_m3_common_t;
 
@@ -188,7 +188,7 @@ int cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoin
 int cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 int cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 
-extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
-extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap, const char *variant);
+//extern int cortex_m3_register_commands(struct command_context_s *cmd_ctx);
+extern int cortex_m3_init_arch_info(target_t *target, cortex_m3_common_t *cortex_m3, jtag_tap_t *tap);
 
 #endif /* CORTEX_M3_H */