Duane Ellis: fix warnings

[fw/openocd] / src / target / cortex_m3.c

diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index a90baafaf57f96fcdf48bb235448b9faeee4c191..9e0916ff3ad49856e21647a1bae0a1e514ec08ca 100644 (file)
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -47,11 +47,11 @@ void cortex_m3_enable_breakpoints(struct target_s *target);
 void cortex_m3_enable_watchpoints(struct target_s *target);
 int cortex_m3_target_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct target_s *target);
 int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int cortex_m3_quit();
+int cortex_m3_quit(void);
 int cortex_m3_load_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 *value);
 int cortex_m3_store_core_reg_u32(target_t *target, enum armv7m_regtype type, u32 num, u32 value);
 int cortex_m3_target_request_data(target_t *target, u32 size, u8 *buffer);
-int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target);
+int cortex_m3_examine(struct target_s *target);
 
 #ifdef ARMV7_GDB_HACKS
 extern u8 armv7m_gdb_dummy_cpsr_value[];
@@ -691,7 +691,7 @@ int cortex_m3_assert_reset(target_t *target)
                
        ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
        
-       if (target->reset_mode == RESET_RUN)
+       if (!target->reset_halt)
        {
                /* Set/Clear C_MASKINTS in a separate operation */
                if (cortex_m3->dcb_dhcsr & C_MASKINTS)
@@ -762,6 +762,13 @@ int cortex_m3_assert_reset(target_t *target)
        
        armv7m_invalidate_core_regs(target);
 
+    if (target->reset_halt)
+    {
+       int retval;
+               if ((retval = target_halt(target))!=ERROR_OK)
+                       return retval;
+    }
+       
        return ERROR_OK;
 }
 
@@ -1307,7 +1314,7 @@ int cortex_m3_init_target(struct command_context_s *cmd_ctx, struct target_s *ta
        return ERROR_OK;
 }
 
-int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target)
+int cortex_m3_examine(struct target_s *target)
 {
        int retval;
        u32 cpuid, fpcr, dwtcr, ictr;
@@ -1367,7 +1374,7 @@ int cortex_m3_examine(struct command_context_s *cmd_ctx, struct target_s *target
        return ERROR_OK;
 }
 
-int cortex_m3_quit()
+int cortex_m3_quit(void)
 {
        
        return ERROR_OK;