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reg_t -> struct reg
[fw/openocd] / src / target / cortex_m3.c
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index ae714462e3693d647a66f22c9f36bae40f0bda09..58c3d8f71d4a0b8aaa2a22109d73c279d549cb67 100644 (file)
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -45,15 +45,15 @@
 
 
 /* forward declarations */
-static int cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-static int cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
+static int cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
+static int cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint);
 static void cortex_m3_enable_watchpoints(struct target_s *target);
 static int cortex_m3_store_core_reg_u32(target_t *target,
                enum armv7m_regtype type, uint32_t num, uint32_t value);
 
 #ifdef ARMV7_GDB_HACKS
 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
-extern reg_t armv7m_gdb_dummy_cpsr_reg;
+extern struct reg armv7m_gdb_dummy_cpsr_reg;
 #endif
 
 static int cortexm3_dap_read_coreregister_u32(struct swjdp_common *swjdp,
@@ -121,7 +121,7 @@ static int cortexm3_dap_write_coreregister_u32(struct swjdp_common *swjdp,
 static int cortex_m3_write_debug_halt_mask(target_t *target,
                uint32_t mask_on, uint32_t mask_off)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
 
        /* mask off status bits */
@@ -134,7 +134,7 @@ static int cortex_m3_write_debug_halt_mask(target_t *target,
 
 static int cortex_m3_clear_halt(target_t *target)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
 
        /* clear step if any */
@@ -151,7 +151,7 @@ static int cortex_m3_clear_halt(target_t *target)
 
 static int cortex_m3_single_step_core(target_t *target)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
        uint32_t dhcsr_save;
 
@@ -175,10 +175,10 @@ static int cortex_m3_endreset_event(target_t *target)
 {
        int i;
        uint32_t dcb_demcr;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
-       cortex_m3_fp_comparator_t *fp_list = cortex_m3->fp_comparator_list;
-       cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
+       struct cortex_m3_fp_comparator *fp_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_dwt_comparator *dwt_list = cortex_m3->dwt_comparator_list;
 
        mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
        LOG_DEBUG("DCB_DEMCR = 0x%8.8" PRIx32 "",dcb_demcr);
@@ -231,7 +231,7 @@ static int cortex_m3_endreset_event(target_t *target)
 
 static int cortex_m3_examine_debug_reason(target_t *target)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        /* THIS IS NOT GOOD, TODO - better logic for detection of debug state reason */
        /* only check the debug reason if we don't know it already */
@@ -259,7 +259,7 @@ static int cortex_m3_examine_debug_reason(target_t *target)
 static int cortex_m3_examine_exception_reason(target_t *target)
 {
        uint32_t shcsr, except_sr, cfsr = -1, except_ar = -1;
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
        mem_ap_read_u32(swjdp, NVIC_SHCSR, &shcsr);
@@ -309,8 +309,8 @@ static int cortex_m3_debug_entry(target_t *target)
        int i;
        uint32_t xPSR;
        int retval;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       struct armv7m_common_s *armv7m = &cortex_m3->armv7m;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct armv7m_common *armv7m = &cortex_m3->armv7m;
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
        LOG_DEBUG(" ");
@@ -380,7 +380,7 @@ static int cortex_m3_poll(target_t *target)
 {
        int retval;
        enum target_state prev_target_state = target->state;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
 
        /* Read from Debug Halting Control and Status Register */
@@ -494,7 +494,7 @@ static int cortex_m3_halt(target_t *target)
 
 static int cortex_m3_soft_reset_halt(struct target_s *target)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
        uint32_t dcb_dhcsr = 0;
        int retval, timeout = 0;
@@ -533,7 +533,7 @@ static int cortex_m3_soft_reset_halt(struct target_s *target)
 
 static void cortex_m3_enable_breakpoints(struct target_s *target)
 {
-       breakpoint_t *breakpoint = target->breakpoints;
+       struct breakpoint *breakpoint = target->breakpoints;
 
        /* set any pending breakpoints */
        while (breakpoint)
@@ -547,8 +547,8 @@ static void cortex_m3_enable_breakpoints(struct target_s *target)
 static int cortex_m3_resume(struct target_s *target, int current,
                uint32_t address, int handle_breakpoints, int debug_execution)
 {
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
-       breakpoint_t *breakpoint = NULL;
+       struct armv7m_common *armv7m = target_to_armv7m(target);
+       struct breakpoint *breakpoint = NULL;
        uint32_t resume_pc;
 
        if (target->state != TARGET_HALTED)
@@ -635,10 +635,10 @@ static int cortex_m3_resume(struct target_s *target, int current,
 static int cortex_m3_step(struct target_s *target, int current,
                uint32_t address, int handle_breakpoints)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       struct armv7m_common_s *armv7m = &cortex_m3->armv7m;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct armv7m_common *armv7m = &cortex_m3->armv7m;
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
-       breakpoint_t *breakpoint = NULL;
+       struct breakpoint *breakpoint = NULL;
 
        if (target->state != TARGET_HALTED)
        {
@@ -686,7 +686,7 @@ static int cortex_m3_step(struct target_s *target, int current,
 
 static int cortex_m3_assert_reset(target_t *target)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
        int assert_srst = 1;
 
@@ -833,13 +833,13 @@ static int cortex_m3_deassert_reset(target_t *target)
 }
 
 static int
-cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
        int retval;
        int fp_num = 0;
        uint32_t hilo;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       cortex_m3_fp_comparator_t *comparator_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_fp_comparator *comparator_list = cortex_m3->fp_comparator_list;
 
        if (breakpoint->set)
        {
@@ -900,11 +900,11 @@ cortex_m3_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 }
 
 static int
-cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
        int retval;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       cortex_m3_fp_comparator_t * comparator_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_fp_comparator * comparator_list = cortex_m3->fp_comparator_list;
 
        if (!breakpoint->set)
        {
@@ -955,9 +955,9 @@ cortex_m3_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 }
 
 static int
-cortex_m3_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+cortex_m3_add_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        if (cortex_m3->auto_bp_type)
        {
@@ -1004,9 +1004,9 @@ cortex_m3_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 }
 
 static int
-cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
+cortex_m3_remove_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        /* REVISIT why check? FBP can be updated with core running ... */
        if (target->state != TARGET_HALTED)
@@ -1032,11 +1032,11 @@ cortex_m3_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 }
 
 static int
-cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+cortex_m3_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
        int dwt_num = 0;
        uint32_t mask, temp;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        /* watchpoint params were validated earlier */
        mask = 0;
@@ -1052,7 +1052,7 @@ cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
         * watchpoint using comparator #1; comparator #0 matching cycle
         * count; send data trace info through ITM and TPIU; etc
         */
-       cortex_m3_dwt_comparator_t *comparator;
+       struct cortex_m3_dwt_comparator *comparator;
 
        for (comparator = cortex_m3->dwt_comparator_list;
                        comparator->used && dwt_num < cortex_m3->dwt_num_comp;
@@ -1097,10 +1097,10 @@ cortex_m3_set_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
 }
 
 static int
-cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+cortex_m3_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       cortex_m3_dwt_comparator_t *comparator;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_dwt_comparator *comparator;
        int dwt_num;
 
        if (!watchpoint->set)
@@ -1134,9 +1134,9 @@ cortex_m3_unset_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
 }
 
 static int
-cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+cortex_m3_add_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        /* REVISIT why check? DWT can be updated with core running ... */
        if (target->state != TARGET_HALTED)
@@ -1192,9 +1192,9 @@ cortex_m3_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
 }
 
 static int
-cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
+cortex_m3_remove_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
 
        /* REVISIT why check? DWT can be updated with core running ... */
        if (target->state != TARGET_HALTED)
@@ -1216,7 +1216,7 @@ cortex_m3_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
 
 static void cortex_m3_enable_watchpoints(struct target_s *target)
 {
-       watchpoint_t *watchpoint = target->watchpoints;
+       struct watchpoint *watchpoint = target->watchpoints;
 
        /* set any pending watchpoints */
        while (watchpoint)
@@ -1231,7 +1231,7 @@ static int cortex_m3_load_core_reg_u32(struct target_s *target,
                enum armv7m_regtype type, uint32_t num, uint32_t * value)
 {
        int retval;
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
        /* NOTE:  we "know" here that the register identifiers used
@@ -1295,7 +1295,7 @@ static int cortex_m3_store_core_reg_u32(struct target_s *target,
 {
        int retval;
        uint32_t reg;
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
 #ifdef ARMV7_GDB_HACKS
@@ -1370,7 +1370,7 @@ static int cortex_m3_store_core_reg_u32(struct target_s *target,
 static int cortex_m3_read_memory(struct target_s *target, uint32_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
        int retval;
 
@@ -1402,7 +1402,7 @@ static int cortex_m3_read_memory(struct target_s *target, uint32_t address,
 static int cortex_m3_write_memory(struct target_s *target, uint32_t address,
                uint32_t size, uint32_t count, uint8_t *buffer)
 {
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
        int retval;
 
@@ -1453,14 +1453,14 @@ struct dwt_reg_state {
        uint32_t        value;  /* scratch/cache */
 };
 
-static int cortex_m3_dwt_get_reg(struct reg_s *reg)
+static int cortex_m3_dwt_get_reg(struct reg *reg)
 {
        struct dwt_reg_state *state = reg->arch_info;
 
        return target_read_u32(state->target, state->addr, &state->value);
 }
 
-static int cortex_m3_dwt_set_reg(struct reg_s *reg, uint8_t *buf)
+static int cortex_m3_dwt_set_reg(struct reg *reg, uint8_t *buf)
 {
        struct dwt_reg_state *state = reg->arch_info;
 
@@ -1495,7 +1495,7 @@ static struct dwt_reg dwt_comp[] = {
 static int dwt_reg_type = -1;
 
 static void
-cortex_m3_dwt_addreg(struct target_s *t, struct reg_s *r, struct dwt_reg *d)
+cortex_m3_dwt_addreg(struct target_s *t, struct reg *r, struct dwt_reg *d)
 {
        struct dwt_reg_state *state;
 
@@ -1513,11 +1513,11 @@ cortex_m3_dwt_addreg(struct target_s *t, struct reg_s *r, struct dwt_reg *d)
 }
 
 static void
-cortex_m3_dwt_setup(cortex_m3_common_t *cm3, struct target_s *target)
+cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target_s *target)
 {
        uint32_t dwtcr;
-       struct reg_cache_s *cache;
-       cortex_m3_dwt_comparator_t *comparator;
+       struct reg_cache *cache;
+       struct cortex_m3_dwt_comparator *comparator;
        int reg, i;
 
        target_read_u32(target, DWT_CTRL, &dwtcr);
@@ -1533,7 +1533,7 @@ cortex_m3_dwt_setup(cortex_m3_common_t *cm3, struct target_s *target)
        cm3->dwt_num_comp = (dwtcr >> 28) & 0xF;
        cm3->dwt_comp_available = cm3->dwt_num_comp;
        cm3->dwt_comparator_list = calloc(cm3->dwt_num_comp,
-                       sizeof(cortex_m3_dwt_comparator_t));
+                       sizeof(struct cortex_m3_dwt_comparator));
        if (!cm3->dwt_comparator_list) {
 fail0:
                cm3->dwt_num_comp = 0;
@@ -1587,7 +1587,7 @@ static int cortex_m3_examine(struct target_s *target)
        int retval;
        uint32_t cpuid, fpcr;
        int i;
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
 
        if ((retval = ahbap_debugport_init(swjdp)) != ERROR_OK)
@@ -1614,7 +1614,7 @@ static int cortex_m3_examine(struct target_s *target)
                cortex_m3->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF); /* bits [14:12] and [7:4] */
                cortex_m3->fp_num_lit = (fpcr >> 8) & 0xF;
                cortex_m3->fp_code_available = cortex_m3->fp_num_code;
-               cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(cortex_m3_fp_comparator_t));
+               cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(struct cortex_m3_fp_comparator));
                cortex_m3->fpb_enabled = fpcr & 1;
                for (i = 0; i < cortex_m3->fp_num_code + cortex_m3->fp_num_lit; i++)
                {
@@ -1654,7 +1654,7 @@ static int cortex_m3_dcc_read(struct swjdp_common *swjdp, uint8_t *value, uint8_
 static int cortex_m3_target_request_data(target_t *target,
                uint32_t size, uint8_t *buffer)
 {
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
        uint8_t data;
        uint8_t ctrl;
@@ -1674,7 +1674,7 @@ static int cortex_m3_handle_target_request(void *priv)
        target_t *target = priv;
        if (!target_was_examined(target))
                return ERROR_OK;
-       struct armv7m_common_s *armv7m = target_to_armv7m(target);
+       struct armv7m_common *armv7m = target_to_armv7m(target);
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
 
        if (!target->dbg_msg_enabled)
@@ -1708,10 +1708,10 @@ static int cortex_m3_handle_target_request(void *priv)
 }
 
 static int cortex_m3_init_arch_info(target_t *target,
-               cortex_m3_common_t *cortex_m3, struct jtag_tap *tap)
+               struct cortex_m3_common *cortex_m3, struct jtag_tap *tap)
 {
        int retval;
-       struct armv7m_common_s *armv7m = &cortex_m3->armv7m;
+       struct armv7m_common *armv7m = &cortex_m3->armv7m;
 
        armv7m_init_arch_info(target, armv7m);
 
@@ -1749,7 +1749,7 @@ static int cortex_m3_init_arch_info(target_t *target,
 
 static int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp)
 {
-       cortex_m3_common_t *cortex_m3 = calloc(1,sizeof(cortex_m3_common_t));
+       struct cortex_m3_common *cortex_m3 = calloc(1,sizeof(struct cortex_m3_common));
 
        cortex_m3->common_magic = CORTEX_M3_COMMON_MAGIC;
        cortex_m3_init_arch_info(target, cortex_m3, target->tap);
@@ -1760,7 +1760,7 @@ static int cortex_m3_target_create(struct target_s *target, Jim_Interp *interp)
 /*--------------------------------------------------------------------------*/
 
 static int cortex_m3_verify_pointer(struct command_context_s *cmd_ctx,
-               struct cortex_m3_common_s *cm3)
+               struct cortex_m3_common *cm3)
 {
        if (cm3->common_magic != CORTEX_M3_COMMON_MAGIC) {
                command_print(cmd_ctx, "target is not a Cortex-M3");
@@ -1785,10 +1785,10 @@ COMMAND_HANDLER(handle_cortex_m3_disassemble_command)
 {
        int retval;
        target_t *target = get_current_target(cmd_ctx);
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        uint32_t address;
        unsigned long count = 1;
-       arm_instruction_t cur_instruction;
+       struct arm_instruction cur_instruction;
 
        retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
        if (retval != ERROR_OK)
@@ -1836,8 +1836,8 @@ static const struct {
 COMMAND_HANDLER(handle_cortex_m3_vector_catch_command)
 {
        target_t *target = get_current_target(cmd_ctx);
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
-       struct armv7m_common_s *armv7m = &cortex_m3->armv7m;
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
+       struct armv7m_common *armv7m = &cortex_m3->armv7m;
        struct swjdp_common *swjdp = &armv7m->swjdp_info;
        uint32_t demcr = 0;
        int retval;
@@ -1893,7 +1893,7 @@ write:
 COMMAND_HANDLER(handle_cortex_m3_mask_interrupts_command)
 {
        target_t *target = get_current_target(cmd_ctx);
-       struct cortex_m3_common_s *cortex_m3 = target_to_cm3(target);
+       struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        int retval;
 
        retval = cortex_m3_verify_pointer(cmd_ctx, cortex_m3);
@@ -1951,7 +1951,7 @@ static int cortex_m3_register_commands(struct command_context_s *cmd_ctx)
        return retval;
 }
 
-target_type_t cortexm3_target =
+struct target_type cortexm3_target =
 {
        .name = "cortex_m3",
 
openocd with support for Altus Metrum targets