reg_t -> struct reg
[fw/openocd] / src / target / cortex_m3.c
index 041f8061968f71c09b2ddcf4bb436bb105fd0ef1..58c3d8f71d4a0b8aaa2a22109d73c279d549cb67 100644 (file)
@@ -53,7 +53,7 @@ static int cortex_m3_store_core_reg_u32(target_t *target,
 
 #ifdef ARMV7_GDB_HACKS
 extern uint8_t armv7m_gdb_dummy_cpsr_value[];
-extern reg_t armv7m_gdb_dummy_cpsr_reg;
+extern struct reg armv7m_gdb_dummy_cpsr_reg;
 #endif
 
 static int cortexm3_dap_read_coreregister_u32(struct swjdp_common *swjdp,
@@ -177,8 +177,8 @@ static int cortex_m3_endreset_event(target_t *target)
        uint32_t dcb_demcr;
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
        struct swjdp_common *swjdp = &cortex_m3->armv7m.swjdp_info;
-       cortex_m3_fp_comparator_t *fp_list = cortex_m3->fp_comparator_list;
-       cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
+       struct cortex_m3_fp_comparator *fp_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_dwt_comparator *dwt_list = cortex_m3->dwt_comparator_list;
 
        mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
        LOG_DEBUG("DCB_DEMCR = 0x%8.8" PRIx32 "",dcb_demcr);
@@ -839,7 +839,7 @@ cortex_m3_set_breakpoint(struct target_s *target, struct breakpoint *breakpoint)
        int fp_num = 0;
        uint32_t hilo;
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
-       cortex_m3_fp_comparator_t *comparator_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_fp_comparator *comparator_list = cortex_m3->fp_comparator_list;
 
        if (breakpoint->set)
        {
@@ -904,7 +904,7 @@ cortex_m3_unset_breakpoint(struct target_s *target, struct breakpoint *breakpoin
 {
        int retval;
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
-       cortex_m3_fp_comparator_t * comparator_list = cortex_m3->fp_comparator_list;
+       struct cortex_m3_fp_comparator * comparator_list = cortex_m3->fp_comparator_list;
 
        if (!breakpoint->set)
        {
@@ -1052,7 +1052,7 @@ cortex_m3_set_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
         * watchpoint using comparator #1; comparator #0 matching cycle
         * count; send data trace info through ITM and TPIU; etc
         */
-       cortex_m3_dwt_comparator_t *comparator;
+       struct cortex_m3_dwt_comparator *comparator;
 
        for (comparator = cortex_m3->dwt_comparator_list;
                        comparator->used && dwt_num < cortex_m3->dwt_num_comp;
@@ -1100,7 +1100,7 @@ static int
 cortex_m3_unset_watchpoint(struct target_s *target, struct watchpoint *watchpoint)
 {
        struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
-       cortex_m3_dwt_comparator_t *comparator;
+       struct cortex_m3_dwt_comparator *comparator;
        int dwt_num;
 
        if (!watchpoint->set)
@@ -1453,14 +1453,14 @@ struct dwt_reg_state {
        uint32_t        value;  /* scratch/cache */
 };
 
-static int cortex_m3_dwt_get_reg(struct reg_s *reg)
+static int cortex_m3_dwt_get_reg(struct reg *reg)
 {
        struct dwt_reg_state *state = reg->arch_info;
 
        return target_read_u32(state->target, state->addr, &state->value);
 }
 
-static int cortex_m3_dwt_set_reg(struct reg_s *reg, uint8_t *buf)
+static int cortex_m3_dwt_set_reg(struct reg *reg, uint8_t *buf)
 {
        struct dwt_reg_state *state = reg->arch_info;
 
@@ -1495,7 +1495,7 @@ static struct dwt_reg dwt_comp[] = {
 static int dwt_reg_type = -1;
 
 static void
-cortex_m3_dwt_addreg(struct target_s *t, struct reg_s *r, struct dwt_reg *d)
+cortex_m3_dwt_addreg(struct target_s *t, struct reg *r, struct dwt_reg *d)
 {
        struct dwt_reg_state *state;
 
@@ -1517,7 +1517,7 @@ cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target_s *target)
 {
        uint32_t dwtcr;
        struct reg_cache *cache;
-       cortex_m3_dwt_comparator_t *comparator;
+       struct cortex_m3_dwt_comparator *comparator;
        int reg, i;
 
        target_read_u32(target, DWT_CTRL, &dwtcr);
@@ -1533,7 +1533,7 @@ cortex_m3_dwt_setup(struct cortex_m3_common *cm3, struct target_s *target)
        cm3->dwt_num_comp = (dwtcr >> 28) & 0xF;
        cm3->dwt_comp_available = cm3->dwt_num_comp;
        cm3->dwt_comparator_list = calloc(cm3->dwt_num_comp,
-                       sizeof(cortex_m3_dwt_comparator_t));
+                       sizeof(struct cortex_m3_dwt_comparator));
        if (!cm3->dwt_comparator_list) {
 fail0:
                cm3->dwt_num_comp = 0;
@@ -1614,7 +1614,7 @@ static int cortex_m3_examine(struct target_s *target)
                cortex_m3->fp_num_code = ((fpcr >> 8) & 0x70) | ((fpcr >> 4) & 0xF); /* bits [14:12] and [7:4] */
                cortex_m3->fp_num_lit = (fpcr >> 8) & 0xF;
                cortex_m3->fp_code_available = cortex_m3->fp_num_code;
-               cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(cortex_m3_fp_comparator_t));
+               cortex_m3->fp_comparator_list = calloc(cortex_m3->fp_num_code + cortex_m3->fp_num_lit, sizeof(struct cortex_m3_fp_comparator));
                cortex_m3->fpb_enabled = fpcr & 1;
                for (i = 0; i < cortex_m3->fp_num_code + cortex_m3->fp_num_lit; i++)
                {
@@ -1951,7 +1951,7 @@ static int cortex_m3_register_commands(struct command_context_s *cmd_ctx)
        return retval;
 }
 
-target_type_t cortexm3_target =
+struct target_type cortexm3_target =
 {
        .name = "cortex_m3",