riscv: drop unused variable

[fw/openocd] / src / target / cortex_m.h

diff --git a/src/target/cortex_m.h b/src/target/cortex_m.h
index 794eda4c7744196047ed151b8df6ed09cfa7e207..0f221ffff455b535e32b532485e9a3ca5f691498 100644 (file)
--- a/src/target/cortex_m.h
+++ b/src/target/cortex_m.h
@@ -35,6 +35,8 @@
 #define ITM_TER0       0xE0000E00
 #define ITM_TPR                0xE0000E40
 #define ITM_TCR                0xE0000E80
+#define ITM_TCR_ITMENA_BIT     BIT(0)
+#define ITM_TCR_BUSY_BIT       BIT(23)
 #define ITM_LAR                0xE0000FB0
 #define ITM_LAR_KEY    0xC5ACCE55
 
@@ -44,12 +46,15 @@
 
 #define CORTEX_M23_PARTNO      0xD200
 #define CORTEX_M33_PARTNO      0xD210
+#define CORTEX_M35P_PARTNO     0xD310
+#define CORTEX_M55_PARTNO      0xD220
 
 /* Debug Control Block */
 #define DCB_DHCSR      0xE000EDF0
 #define DCB_DCRSR      0xE000EDF4
 #define DCB_DCRDR      0xE000EDF8
 #define DCB_DEMCR      0xE000EDFC
+#define DCB_DSCSR      0xE000EE08
 
 #define DCRSR_WnR      BIT(16)
 
@@ -114,6 +119,9 @@
 #define VC_MMERR               BIT(4)
 #define VC_CORERESET   BIT(0)
 
+/* DCB_DSCSR bit and field definitions */
+#define DSCSR_CDS              BIT(16)
+
 /* NVIC registers */
 #define NVIC_ICTR              0xE000E004
 #define NVIC_ISE0              0xE000E100
@@ -188,15 +196,15 @@ struct cortex_m_common {
        uint32_t nvic_icsr;  /* Interrupt Control State Register - shows active and pending IRQ */
 
        /* Flash Patch and Breakpoint (FPB) */
-       int fp_num_lit;
-       int fp_num_code;
+       unsigned int fp_num_lit;
+       unsigned int fp_num_code;
        int fp_rev;
        bool fpb_enabled;
        struct cortex_m_fp_comparator *fp_comparator_list;
 
        /* Data Watchpoint and Trace (DWT) */
-       int dwt_num_comp;
-       int dwt_comp_available;
+       unsigned int dwt_num_comp;
+       unsigned int dwt_comp_available;
        uint32_t dwt_devarch;
        struct cortex_m_dwt_comparator *dwt_comparator_list;
        struct reg_cache *dwt_cache;
@@ -227,13 +235,10 @@ int cortex_m_set_breakpoint(struct target *target, struct breakpoint *breakpoint
 int cortex_m_unset_breakpoint(struct target *target, struct breakpoint *breakpoint);
 int cortex_m_add_breakpoint(struct target *target, struct breakpoint *breakpoint);
 int cortex_m_remove_breakpoint(struct target *target, struct breakpoint *breakpoint);
-int cortex_m_set_watchpoint(struct target *target, struct watchpoint *watchpoint);
-int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint);
 int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpoint);
 void cortex_m_enable_breakpoints(struct target *target);
 void cortex_m_enable_watchpoints(struct target *target);
-void cortex_m_dwt_setup(struct cortex_m_common *cm, struct target *target);
 void cortex_m_deinit_target(struct target *target);
 int cortex_m_profiling(struct target *target, uint32_t *samples,
        uint32_t max_num_samples, uint32_t *num_samples, uint32_t seconds);