r = arm->cpsr;
xPSR = buf_get_u32(r->value, 0, 32);
- /* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
- if (xPSR & 0xf00) {
- r->dirty = r->valid;
- cortex_m_store_core_reg_u32(target, 16, xPSR & ~0xff);
- }
-
/* Are we in an exception handler */
if (xPSR & 0x1FF) {
armv7m->exception_number = (xPSR & 0x1FF);
* in parallel with disabled interrupts can cause local faults
* to not be taken.
*
- * REVISIT this clearly breaks non-debug execution, since the
- * PRIMASK register state isn't saved/restored... workaround
- * by never resuming app code after debug execution.
+ * This breaks non-debug (application) execution if not
+ * called from armv7m_start_algorithm() which saves registers.
*/
buf_set_u32(r->value, 0, 1, 1);
r->dirty = true;
r->valid = true;
- /* Make sure we are in Thumb mode */
+ /* Make sure we are in Thumb mode, set xPSR.T bit */
+ /* armv7m_start_algorithm() initializes entire xPSR register.
+ * This duplicity handles the case when cortex_m_resume()
+ * is used with the debug_execution flag directly,
+ * not called through armv7m_start_algorithm().
+ */
r = armv7m->arm.cpsr;
buf_set_u32(r->value, 24, 1, 1);
r->dirty = true;
for (idx = ARMV7M_NUM_CORE_REGS_NOFP;
idx < armv7m->arm.core_cache->num_regs;
idx++) {
- free(armv7m->arm.core_cache->reg_list[idx].value);
free(armv7m->arm.core_cache->reg_list[idx].feature);
free(armv7m->arm.core_cache->reg_list[idx].reg_data_type);
}